Topic	Replies	Views	Activity
Ways to make a sim.do use previuosly compiled sources? UVM UVM , compilation , compiler-directive , compilation-macro	3	925	March 23, 2022
Compiling a package and an interface into a library SystemVerilog SystemVerilog , Package , interface , compilation , library	1	1070	August 13, 2021
UVM compilation dependencies UVM UVM , compilation , vcs , dependencies	1	3323	March 22, 2016
Compilation Error:: virtual interface XMR connected to task/function ref-port is not yet supported Coverage Coverage , compilation	8	5085	August 28, 2015
When is "Compiling package uvm_sv_unit" triggered in vlog compile? UVM UVM , compilation , modelsim , uvm_sv_unit , uvm-harness	4	2229	June 30, 2015
Should driver/sequencer class name be different from object name? UVM UVM , sequencerdriver-class-name , compilation	1	3945	April 21, 2014

compilation