Topics tagged compilation-macro

Topic	Replies	Views	Activity
How text macro affect inside and outside pkg? SystemVerilog SystemVerilog , compilation-macro	2	166	April 27, 2024
Using macro as part of an array declaration's range SystemVerilog SystemVerilog , compilation-macro	1	525	April 14, 2023
Passing string name as input to macro but internally it represents the actual value. Is that Possible? UVM UVM , compilation-macro	2	1671	March 27, 2022
Ways to make a sim.do use previuosly compiled sources? UVM UVM , compilation , compiler-directive , compilation-macro	3	922	March 23, 2022
Compiler directives for re-defination of user code and macro expansion with backstic UVM UVM , compiler-directive , compilation-macro	2	825	July 28, 2021
Signal name in Macro SystemVerilog SystemVerilog , compilation-macro	4	1812	December 2, 2020
Assertion macros SystemVerilog SystemVerilog , assertion , generate-macro-define , create-macros-or-general-functions , compilation-macro	2	1893	October 19, 2020
Macro expansion with path name causes syntax error SystemVerilog SystemVerilog , modelsim , compilation-macro	2	1875	February 5, 2020
Define macro to substitute reg name in regmodel SystemVerilog SystemVerilog , generate-macro-define , Dave-Rich , compilation-macro	1	946	January 27, 2020