Topics tagged Interfaces

Topic	Replies	Views	Activity
Interface and Virtual interface SystemVerilog Interfaces	1	66	November 29, 2024
Parametrized interfaces SystemVerilog Interfaces	1	702	January 10, 2024
SV Interfaces: best coding style to encapsulate functionality? SystemVerilog SystemVerilog , Interfaces	8	1651	October 12, 2023
How can I assign one interface to another interface without manually connecting all signals? SystemVerilog SystemVerilog , Interfaces	11	15288	August 30, 2022
System Verilog Interface used in multiple places SystemVerilog SystemVerilog , Interfaces , dave_rich	1	617	May 12, 2021
Why extern forkjoin function won't work in interface? SystemVerilog SystemVerilog , functions-in-system-verilog , Interfaces	1	807	February 23, 2021
SystemVerilog Interface Syntesis SystemVerilog SystemVerilog , HDL-designer-systemverilog-interface , Interfaces , synthesis	7	1673	November 22, 2019
Interface function with type parameter SystemVerilog SystemVerilog , Interfaces	1	982	July 19, 2019
Driving a wire from a task in an interface SystemVerilog SystemVerilog , wire , Compilation-Error , Interfaces	11	8505	July 1, 2019
Multi dimensional array of interfaces SystemVerilog SystemVerilog , Interfaces	7	3709	July 24, 2017
Driving a single signal with multiple interfaces UVM UVM , Interfaces , multiply-driven-signals , Sharing-signals	7	4843	February 13, 2017
Is there any way to store a reference to a variable? SystemVerilog SystemVerilog , Interfaces , Passing-by-reference	1	7291	February 9, 2017