Topic	Replies	Views	Activity
Sharing multiple parametrized typedefs across multiple classes UVM SystemVerilog , UVM , reference-model	1	316	November 29, 2023
Connection between Reference Model and Scoreboard UVM UVM , scoreboard , reference-model	3	1004	June 19, 2023
The transaction from the reference model has one positive edge delay to be disaplyed in the scoreboard UVM UVM , reference-model , monitor , UVM-scoreboard	1	525	February 27, 2023
Clock Monitoring UVM UVM , reference-model , monitor , clock	7	1601	September 3, 2021
UVM/UVMF Reference Model as a remote node in a point-to-point connection with a CODEC (DUT) to be verified UVM UVM , reference-model , Golden-Model , Reference-Model-as-the-other-side-of-a-point-to-point-link , Direct-Interaction-between-the-DUT-and-the-Reference-Model , How-and-Where-to-Implement-a-Model-that-Communicates-at-Signal-Level-with-the-DUT	2	766	September 2, 2021
FSM in DUT UVM UVM , reference-model	2	1378	January 23, 2019
Should reference models get the virtual interface handle of the DUT's interface? UVM UVM , reference-model	1	1559	May 31, 2014
Reference Model UVM UVM , reference-model	2	2224	May 20, 2014
Return struct/string from C to SV UVM UVM , return-data , reference-model	1	2754	April 21, 2014
Reference model UVM UVM , reference-model	1	2180	April 21, 2014

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