driver-monitor
| Topic | Replies | Views | Activity | |
|---|---|---|---|---|
| Monitor Sampling edge |
|
1 | 210 | January 27, 2025 |
| Send a value from driver to monitor without using TLMs |
|
8 | 1622 | July 27, 2020 |
| Write a monitor code for 5 stage pipeline in which if in 1st clk valid signal is high then in 2nd cycle signal1 goes high and in 3rd cycle signal 2 goes high and so on signal 3 and signal 4 |
|
3 | 1281 | February 16, 2019 |
| What is the difference between the two code snippets? |
|
6 | 2976 | October 11, 2017 |
| I2C SCL generation for single master |
|
4 | 5296 | November 23, 2016 |
| Ways to make calls of two tasks to execute concurrently? |
|
4 | 6973 | August 25, 2015 |
| Difference between drive and monitor in system verilog |
|
1 | 2975 | July 26, 2015 |