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  • Bitwise toggle coverage for a bitvector

Bitwise toggle coverage for a bitvector

SystemVerilog 4901
nisreenj
nisreenj
Full Access
3 posts
July 11, 2012 at 12:39 am

Hello,

Is there a easier way in SV to define coverpoint to do a toggle coverage on every bit of a 32 bit vector. Meaning If I have a 32-bit interrupt mask vector and I just want to see if each interrupt was either masked or unmasked , I usually have to code 32 lines of code. for instance

cp_interrupting_csrmask0 : coverpoint m_csr_intr_mask.interrupting_csrmask[0];
cp_interrupting_csrmask1 : coverpoint m_csr_intr_mask.interrupting_csrmask[1];
cp_interrupting_csrmask2 : coverpoint m_csr_intr_mask.interrupting_csrmask[2];
cp_interrupting_csrmask3 : coverpoint m_csr_intr_mask.interrupting_csrmask[3];
cp_interrupting_csrmask4 : coverpoint m_csr_intr_mask.interrupting_csrmask[4];
cp_interrupting_csrmask5 : coverpoint m_csr_intr_mask.interrupting_csrmask[5];
cp_interrupting_csrmask6 : coverpoint m_csr_intr_mask.interrupting_csrmask[6];
cp_interrupting_csrmask7 : coverpoint m_csr_intr_mask.interrupting_csrmask[7];
cp_interrupting_csrmask8 : coverpoint m_csr_intr_mask.interrupting_csrmask[8];
cp_interrupting_csrmask9 : coverpoint m_csr_intr_mask.interrupting_csrmask[9];
cp_interrupting_csrmask10 : coverpoint m_csr_intr_mask.interrupting_csrmask[10];
cp_interrupting_csrmask11 : coverpoint m_csr_intr_mask.interrupting_csrmask[11];
cp_interrupting_csrmask12 : coverpoint m_csr_intr_mask.interrupting_csrmask[12];
cp_interrupting_csrmask13 : coverpoint m_csr_intr_mask.interrupting_csrmask[13];
cp_interrupting_csrmask14 : coverpoint m_csr_intr_mask.interrupting_csrmask[14];
cp_interrupting_csrmask15 : coverpoint m_csr_intr_mask.interrupting_csrmask[15];
cp_interrupting_csrmask16 : coverpoint m_csr_intr_mask.interrupting_csrmask[16];
cp_interrupting_csrmask17 : coverpoint m_csr_intr_mask.interrupting_csrmask[17];
cp_interrupting_csrmask18 : coverpoint m_csr_intr_mask.interrupting_csrmask[18];
cp_interrupting_csrmask19 : coverpoint m_csr_intr_mask.interrupting_csrmask[19];
cp_interrupting_csrmask20 : coverpoint m_csr_intr_mask.interrupting_csrmask[20];
cp_interrupting_csrmask21 : coverpoint m_csr_intr_mask.interrupting_csrmask[21];
cp_interrupting_csrmask22 : coverpoint m_csr_intr_mask.interrupting_csrmask[22];
cp_interrupting_csrmask23 : coverpoint m_csr_intr_mask.interrupting_csrmask[23];
cp_interrupting_csrmask24 : coverpoint m_csr_intr_mask.interrupting_csrmask[24];
cp_interrupting_csrmask25 : coverpoint m_csr_intr_mask.interrupting_csrmask[25];
cp_interrupting_csrmask26 : coverpoint m_csr_intr_mask.interrupting_csrmask[26];
cp_interrupting_csrmask27 : coverpoint m_csr_intr_mask.interrupting_csrmask[27];
cp_interrupting_csrmask28 : coverpoint m_csr_intr_mask.interrupting_csrmask[28];
cp_interrupting_csrmask29 : coverpoint m_csr_intr_mask.interrupting_csrmask[29];
cp_interrupting_csrmask30 : coverpoint m_csr_intr_mask.interrupting_csrmask[30];
cp_interrupting_csrmask31 : coverpoint m_csr_intr_mask.interrupting_csrmask[31];

Is there a neater way to do a toggle functional coverage bitwise for a vector.

Regards,
Nisreen

Replies

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dave_59
dave_59
Forum Moderator
8466 posts
July 11, 2012 at 11:51 pm

You could write a covergroup with a single coverpoint that you construct multiple times in an array generated by a for loop. (the covergroup declaration must not be embedded inside a class)

covergroup cgmaskbit(input bit [31:0] position, ref bit [31:0] vector);
  pos: coverpoint (position & vector) !=0;
  option.per_instance = 1;
endgroup
 
cgmaskbit cgmaskbits[32];
 
foreach (cgmaskbits[i]) cgmaskbits[i] = new(1'b1<<i,m_csr_intr_mask.interrupting_csrmask);

— Dave Rich, Verification Architect, Siemens EDA

nisreenj
nisreenj
Forum Access
15 posts
July 12, 2012 at 5:56 am

In reply to dave_59:

Hello Dave,

I used your solution and it works like Jelly Bean.

This mechanism will help the the verif community a lot.

Thanks Again,
Nisreen

paulegan
paulegan
Full Access
26 posts
October 30, 2012 at 9:15 am

In reply to nisreenj:

Dave,

I would like to use this approach inside a class, but if I understand your example correctly the covergroup declaration cannot be embedded in the class. How do I create something similar inside a class?

Pseudo code:

[code]
class my_coverage extends uvm_subscriber #(apb_seq_item);
:
covergroup output_en_cg (input bit position, ref bit vector);
encoding: coverpoint (('1b1<

dave_59
dave_59
Forum Moderator
8466 posts
October 30, 2012 at 9:34 am

In reply to paulegan:

Paul,You can simply move the covergroup declaration outside of the class. The covergroup does not reference any members of the class directly, you pass them in as constructor arguments. You did not show the declaration of output_en_reg.

— Dave Rich, Verification Architect, Siemens EDA

k8
k8
Full Access
2 posts
August 06, 2013 at 10:52 am

In reply to dave_59:

I am trying to construct an array of covergroups in order to sample slices of a parameterized vector as follows:

module checker {
  clk,
  reset, 
  sig
}
parameter WIDTH = 32;
input clk;
input reset;
input [WIDTH-1:0] sig;

// Declare generic covergroup
covergroup CG (ref reg _cp) @ (posedge clk);
  option.per_instance = 1;
  CP: coverpoint _cp;
endgroup 

//Instantiate covergroup
CG cg[32];
for (int i=0; i < WIDTH; i=i+1) begin
  cg[i] = new(sig[i]);
end
endmodule

This line:

CG cg[32]

Is causing the following compiler error: Syntactically this identifier appears to begin a datatype but it does not refer to a visible datatype in the current scope.

I guess I need to declare the covergroup outside the module, but I'm not sure what that would look like. Can anyone provide an example of what that looks like in my case?

shalom
shalom
Full Access
34 posts
August 06, 2013 at 10:04 pm

In reply to k8:

Your tool does not yet support arrays of covergroups.

ajeetha
ajeetha
Forum Access
88 posts
August 08, 2013 at 9:49 am

In reply to shalom:

Use generate + cover property (SVA) to get this easily done.

Ajeetha, CVC
www.cvcblr.com/blog

k8
k8
Full Access
2 posts
August 27, 2013 at 1:58 pm

In reply to ajeetha:

Can you give an example of using cover property with generate? How can I create a parameterized number of bins using cover property?

Thanks

mseyunni
mseyunni
Full Access
192 posts
January 25, 2015 at 8:56 am

In reply to dave_59:

Hi Dave,

In your original solution you mentioned, (the covergroup declaration must not be embedded inside a class). Could you explain what you meant by this ?
where do you define the covergroup definition then ? (lets say you have class extended from uvm_subscriber and you get the transaction from an analysis port)

Madhu

dave_59
dave_59
Forum Moderator
8466 posts
January 25, 2015 at 9:07 am

In reply to mseyunni:

Put the covergroup declaration in front of the class definition. This means that all coverpoint expressions must be passed in as arguments to the covergroup.

— Dave Rich, Verification Architect, Siemens EDA

mseyunni
mseyunni
Full Access
192 posts
January 26, 2015 at 8:14 am

In reply to dave_59:

Hi Dave,

Thanks. I have not understood why you chose the type of the argument for covergroup to be ref. Can you explain ?

Madhu

dave_59
dave_59
Forum Moderator
8466 posts
January 26, 2015 at 8:34 am

In reply to mseyunni:

Page 519 of the 1800-2012 LRM

— Dave Rich, Verification Architect, Siemens EDA

raku
raku
Full Access
37 posts
February 18, 2015 at 6:01 am

In reply to dave_59:

Hi Dave,

I am new to coverage and also i might not have understood the question correctly.

But i was thinking can we use your code inside the class in following manner without using ref in the argument .

class coverage ;
 
bit [31:0] vector;
 
covergroup cg_active_tag_bit(input bit [31:0] position);
  pos: coverpoint (position & vector) !=0;
  option.per_instance = 1;
endgroup : cg_active_tag_bit
 
cg_active_tag_bit cg_active_tag_bits[32];
 
function new(); 
foreach (cg_active_tag_bits[i]) cg_active_tag_bits[i] = new(1'b1 << i);
endunction
 
function sample(input value);
this.vector =value;
foreach (cg_active_tag_bits[i]) cg_active_tag_bits[i].sample();
endfunction
 
endclass

Please correct me if am wrong.
Thanks in advance
rakshith
dave_59
dave_59
Forum Moderator
8466 posts
February 18, 2015 at 2:00 pm

In reply to raku:

rakshith,

The problem is when you declare a covergroup inside a class, it is implicitly declared as a covergroup variable with the same name as the covergroup. Therefore you cannot use the covergroup name as a type to declare another covergroup variable or, in this case, an array of covergroup variables.

Dave

— Dave Rich, Verification Architect, Siemens EDA

racheli kaplan
racheli kaplan
Full Access
1 post
June 10, 2015 at 11:23 pm

In reply to dave_59:

Hello Dave, thanks it works well!
because the covergroups declaration is outside the class, i can use parameter to determine the width:

   covergroup mask (input bit [MASK_WIDTH-1:0] position ,ref bit [MASK_WIDTH-1:0] vector);
            mask_cp : coverpoint (position & vector) !=0;
            option.per_instance = 1;
            //option.comment = "";
   endgroup

but if i would like to make it be more flexible, i mean the width will get different value each time, so then a constant parameter is not good for me.
i thought to do it by the factory registration, like that: `ovm_field_int (m_mask_width, OVM_ALL_ON)
but with this way my covergroups will not recognize it.
how can i declare my covergroups like that?

thanks for your help
Racheli

dave_59
dave_59
Forum Moderator
8466 posts
June 11, 2015 at 10:22 am

In reply to racheli kaplan:

You can define your covergroup using a maximum width, and then use a for-loop instead of a foreach-loop to create a covergroup for each bit.

— Dave Rich, Verification Architect, Siemens EDA

albert
albert
Forum Access
7 posts
August 17, 2015 at 11:20 pm

In reply to dave_59:

Hi Dave,

I am trying to execute this piece of code but it results in only one bin getting created(with address all 0's) instead of 16. could you suggest what might be going wrong here? basically the address value assigned in the function is not seen by the covergroup. Is there any other way i could do this?

Code is as follows:

class xyz ;
 
bit[31:0] address;
bit[31:0] ADDR;
 
covergroup access();
 
addr : coverpoint ADDR { bins Addr[16] = {[0:address]}};  
 
endgroup
 
function void calc();
 
address = 'h10000;
access.sample();
 
endfunction
 
fucntion new();
 
access = new();
 
endfunction
 
task run();
 
 forever begin
    calc();
end
 
endtask
dave_59
dave_59
Forum Moderator
8466 posts
August 18, 2015 at 8:04 am

In reply to albert:

The value of address it read when calling the covergroup's constructor. That is when the bins for the coverpoint are created.

— Dave Rich, Verification Architect, Siemens EDA

albert
albert
Forum Access
7 posts
August 18, 2015 at 8:29 am

In reply to dave_59:

Could you suggest a way this could be done to get 16 bins instead of just 1?

dave_59
dave_59
Forum Moderator
8466 posts
August 18, 2015 at 8:43 am

In reply to albert:

class xyz ;
 
bit[31:0] address;
bit[31:0] ADDR;
 
covergroup access();
  addr : coverpoint ADDR { bins Addr[16] = {[0:address]}};  
endgroup
 
function void calc();
  access.sample();
endfunction
 
fucntion new();
  address = 'h10000; 
  access = new();
endfunction
 
task run();
 
 forever begin
    calc();
    ...
end
 
endtask
endclass

— Dave Rich, Verification Architect, Siemens EDA

albert
albert
Forum Access
7 posts
August 18, 2015 at 3:18 pm

In reply to dave_59:

Hi Dave,

I need to use the ref keyword in order to achieve the behavior I want. But I see 1 bin getting created if I try to do this::

class xyz ;

bit[31:0] address;
bit[31:0] ADDR;

covergroup access(ref bit[31:0] Addr);
addr : coverpoint ADDR { bins addr[16] = {[0:Addr]}};
endgroup

function void calc();
address = 'h10000;
access.sample();
endfunction

fucntion new();
access = new(address);
endfunction

task run();

forever begin
calc();
...
end

endtask
endclass

dave_59
dave_59
Forum Moderator
8466 posts
August 18, 2015 at 3:46 pm

In reply to albert:

The value of ADDR is read when calling the covergroup's constructor. That is when the bins for the coverpoint are created. There is no more bin creation after constructing the covergroup.

So if ADDR has the value 0 when executing the statement access = new(address);
Then addr : coverpoint ADDR { bins addr[16] = {[0:Addr]}}; will be interpreted as addr : coverpoint ADDR { bins addr[16] = {[0:0]}};which creates one one bin for the value 0.

You should have gotten a warning like

Quote:
# ** Warning: (vsim-8546) The number of values specified '1' is less than the size '16' of fixed-size array bin 'Addr' in Coverpoint 'addr' of Covergroup instance '\/top/xyz::access '. The '15' empty bins will not contribute towards coverage.

— Dave Rich, Verification Architect, Siemens EDA

albert
albert
Forum Access
7 posts
August 18, 2015 at 4:01 pm

In reply to dave_59:

Hi Dave,

Thanks for the reply. Yes i did see that warning.

Actually in the function I have calculated the range of address which i want to use in my covergroup.
Basically i want to do this

memory_range : coverpoint range {bins addr[] = {[base_addr, final_addr]};}

which will be dependant on the size of the memory for which i have defined a function. The size and base_addr are read from registers inside the function.

function void calc();

bit [3:0] size;

register read to get size;
register read to get base_addr;
case(size)
4’b0000: begin
Max_addr = ‘h10000;
Final_addr= base_addr+max_addr;
covergroup.sample();
end

4’b0001: …….

endfunction

How should I access the base addr and final addr from the function in my covergroup?

albert
albert
Forum Access
7 posts
August 18, 2015 at 6:39 pm

In reply to albert:

Hi Dave,

Could you please suggest a way in which the above scenario can be achieved?

dave_59
dave_59
Forum Moderator
8466 posts
August 18, 2015 at 10:41 pm

In reply to albert:

You still have not explained your situation very well. Functional coverage in SystemVerilog works by creating in set of value bins associated with a coverpoint, and a set of coverpoints or grouped within a covergroup. The bins are set up once during the covergroup's constructor. The the covergroup repeatedly samples the values of the coverpoint, and the matching value bins are incremented with hits. You call sample() repeatedly hoping the every bin gets hot.

You need to explain what value will be repeatedly sampled and compared with the predefined set of bin values. Perhaps you need to show an example set of data that would be sampled, and explain which bins would be hit those values.

— Dave Rich, Verification Architect, Siemens EDA

albert
albert
Forum Access
7 posts
August 18, 2015 at 10:57 pm

In reply to dave_59:

Hi Dave,

Thanks for the reply.

The basic idea is to create bins with the range of base address and final address.

The base address is programmed through register which is again dependant on size being programmed in another register.

So based on what size is being programmed, i have calculated the max address and final addr would be base + max.

i want to use the values inside the function (like base addr and final addr) in the covergroup.

I want to sample all the addresses which fall within that range. preferably create 16bins and have the address range split across these 16bins.

The problem i am facing now is that the base and final addr is not visible in the covergroup and only 1bin gets created as such.

albert
albert
Forum Access
7 posts
August 19, 2015 at 12:15 pm

In reply to albert:

Hi Dave, Can we have a function inside the coverpoint like below?

covergroup memory_access(string name) with function sample(bit[47:0] sb_addr);
mrom_erom_mmio_range : coverpoint sb_addr {

function bit[47:0] QUEUE[$] mem_region();

bit [47:0] max_addr;
bit [47:0] base_addr;
bit [3:0] size;
bit[47:0] queue [$];
bit [47:0] i;


max_addr = 48'h1000000;
for(i=base_addr; i<=(base_addr+max_addr); i++) begin
queue.push(i);
end
return queue;

endfunction

bins addr = mem_region();
}

endgroup

function void memory_space();

new_addr = {item.addr[5], item.addr[4], item.addr[3], item.addr[2], item.addr[1], item.addr[0]};
memory_access.sample(new_addr);
end

endfunction: memory_space

function new (string name, ovm_component parent);
super.new(name, parent);
memory_access = new({"memory_access_", name()});
endfunction : new

task run();
forever begin
memory_space();
end
endtask : run

Currently on compiling this code, i see syntax error

92: token is 'function'
function bit[47:0] QUEUE[$] mem_region();

Could you provide your input?

manikanta710214
manikanta710214
Full Access
7 posts
March 17, 2016 at 7:49 am

In reply to nisreenj:

you can use perl script also

//+vpp+ foreach my $i (0..31) {
cp_interrupting_csrmask##$i## : coverpoint m_csr_intr_mask.interrupting_csrmask[##$i##];
//+vpp+ }

it will do the for 0 to 31 just 3 steps :)

adrianf0
adrianf0
Full Access
18 posts
July 11, 2019 at 5:46 am

In reply to dave_59:
Thanks for sharing the solution. The problem with maximum_width is that simulator expects an equivalent type for ref formal 'vector' (ie. Questa will return error 8282).

However, one can override built-in sample method:

covergroup cgmaskbit(input bit [31:0] position) with function sample (bit [MAX_WIDTH-1:0] vector);
  pos: coverpoint (position & vector) !=0;
  option.per_instance = 1;
endgroup
rajivdesh
rajivdesh
Full Access
31 posts
May 10, 2020 at 12:05 am

In reply to dave_59:

Hi Dave

Do you have logic for covering of bits from toggling 1=> 0 and 0 => 1 ?

dave_59
dave_59
Forum Moderator
8466 posts
May 10, 2020 at 7:42 am

In reply to rajivdesh:
Same as my original example with transition bins

covergroup cgmaskbit(input bit [31:0] position, ref bit [31:0] vector);
  pos: coverpoint (position & vector) !=0 {
   bins tr[] = (1=> 0,0 => 1 ;}
  option.per_instance = 1;
endgroup

— Dave Rich, Verification Architect, Siemens EDA

Subbi Reddy
Subbi Reddy
Full Access
56 posts
November 25, 2020 at 11:32 pm

In reply to dave_59:
I think, In simulation it will be overload?

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