SPI Block Level Register Testbench
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0
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3538
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April 15, 2014
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How can I get full access?
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0
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2783
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April 12, 2014
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How to split and merge the transactions in AXI protocol
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0
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4017
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January 10, 2014
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Configurable BFM
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0
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2518
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October 8, 2013
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Wishbone UVC
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0
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2405
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September 9, 2013
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I2C Verification environment using the UVM
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8
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21966
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January 22, 2013
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UVM Connect with TLM1 transport interfaces
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2
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3174
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October 12, 2012
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UVM Register Kit for OVM 2.1.2
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20
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16211
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May 4, 2012
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eRM to UVM Migration Kit
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0
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7836
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February 28, 2012
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Automate testbench-DUT connection code
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0
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4603
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February 14, 2012
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Enforce unique sequence and sequence item names with UVM-1.1a
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0
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4120
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February 14, 2012
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Vim Syntax highlighting for SystemVerilog and OVM
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1
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6842
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November 14, 2011
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Questa verification libary
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1
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7908
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September 11, 2011
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Where can I download the ovm_layering_agent extension kit?
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2
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1943
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August 16, 2011
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OVM Harness - How to reuse interface connections
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1
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8628
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July 20, 2011
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How to Share a User Contribution with the Community
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0
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14194
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July 10, 2011
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Runtime Verbosity Package
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0
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9744
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July 8, 2011
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Cadence OVM_RGM2.5 Release (for OVM users planning UVM migration)
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0
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7599
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June 22, 2011
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OVM Command Line Access
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0
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7927
|
October 8, 2010
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Cadence OVM_RGM2.4 Release
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0
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7568
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September 7, 2010
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A Register Package for OVM - OVM_REGISTER-2.1 Release
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0
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9171
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September 3, 2010
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Simple PERL Based UVC Builder
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0
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8017
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July 22, 2010
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CADENCE OVM_RGM2.3 RELEASE
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0
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7107
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July 14, 2010
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UVM Container - Easier DUT to TB Connections
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0
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7932
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May 24, 2010
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A Register Package for OVM - OVM_REGISTER-2.0 Release
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0
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6084
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May 18, 2010
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UVM Early Adopter Kit Available from Accellera
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0
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5519
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May 18, 2010
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OVM Sequence Layering - Easier Tests
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0
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6404
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May 14, 2010
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OVM_RGM2.2 RELEASE
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0
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5903
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May 12, 2010
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OVM_CONTAINER, VIRTUAL INTERFACES, AND CONFIGURATION
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0
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7235
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May 2, 2010
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OVM INTEGRATION WITH SYSTEMC TLM2
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0
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5819
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April 27, 2010
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