UVM Register Kit for OVM 2.1.2

Contributor: Tom Fitzpatrick
Date: June 2, 2011  
Description: UVM Register Kit for OVM 2.1.2

This package is a near verbatim copy of the register layer portion of the Accellera Universal Verification Methodology (UVM) reference library. Minor additions and modifications were made to enable its use as a standalone package and be compatible with OVM 2.1.2.. Having this register package means that OVM users now have a standard, robust and vendor-independent register solution that will not require rewrites or use-model changes if/when they decide to migrate to UVM.

To use the UVM Register package with OVM, you’ll need to import the uvm_reg_pkg and include the uvm_reg_macros.svh file:

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`include "uvm_reg_macros.svh" package my_reg_model; import ovm_pkg::*; import uvm_reg_pkg::*; ... endpackage

 
Download: uvm_reg-1.1.tar.gz  

Hi,
Has this UVM reg package been compiled and tested with OVM 2.1.1?

In reply to badgerbot:

No. The UVM Register Package will only work with OVM 2.1.2, which also contains several bug fixes. 2.1.2 is fully compatible with 2.1.1, so we recommend you upgrade to 2.1.2 to get these fixes and to enable the UVM Reg package.

In reply to Adam:

Has this UVM reg package been compiled and tested with OVM 2.1.1?

No. The standalone uvm_reg_pkg will only work with OVM2.1.2. Along with some important bug fixes over 2.1.1, 2.1.2 includes some restructuring of some base classes and other user-invisible changes to allow integration of the uvm_reg_pkg with OVM code.
In order to use the uvm_reg_pkg with OVM, you’ll have to move to OVM2.1.2. As mentioned though, this will not impact the code that you’ve written.
Good luck,
-Tom

Tom Fitzpatrick
Verification Methodologist

Hi All,
Can anyone point me to the correct way to compile the UVM_REG-1.1 package using OVM-2.1.2 with Cadence Incisive 10.2? I keep getting a compile error complaining that I can’t index an associated array with an ovm_object. I suspect there are some specific compile settings that I need to specify, (since UVM-1.1 will compile using the -uvmhome option) but I can’t find anything specific in any of the Cadence documentation.
Anthony.

Hi,

Is there a document/example to demonstrate on how to migrate from ovm_register_pkg to uvm_register_pkg?

Thanks.

Tom,
I couldn’t find anything in the documentation folder of this register package or UVM register package 2.0. I am looking for base class documentation just like in OVM library. Could you please point me to a tarball which includes the documentation details.

Thanks,
Rajkumar.

@Anthony - the register package comes straight from UVM, with only minor edits and additions as described in the README.txt. Are you using a version of Incisive that supports UVM 1.1? You may need to contact your Cadence representative, for I have no means of reproducing your issue.

@derif1 - other than removing the import uvm_reg_pkg::* statements, the procedure for migrating from OVM to UVM is the same as documented here: OVM2UVM | Verification Academy. There is a new webinar available (registration required) that does a great job walking you through each step: OVM to UVM Migration | UVM Recipe of the Month | Verification Academy

@Rajkumar - the documentation for the UVM Registers is the same as that found in the UVM kit. From the README.txt file:

Documentation

To reduce package size and reduce maintenance issues, documentation for the
UVM Reg Pkg is not included. Documentation can be found in the relevant
sections in UVM Standard document and User Guide, both available for
free download at

  http://www.accellera.org/activities/working-groups/uvm

Keep in mind the text and code samples in the documentation may refer to
UVM base classes and features other than those ported register classes
(e.g. uvm_object). In most cases, these references can be replaced with
their OVM equivalent, i.e. change the u’s to o’s. In any case, these
references should not affect your understanding register model usage
in the OVM.

In reply to Adam:

Hi Adam,
The version of Incisive is able to compile UVM 1.1 without any issues, as long as I use -uvmhome when invoking irun. However to compile ovm I must use -ovmhome, and only one of these options is allowed on the command line for Incisive. Building using -ovmhome, and paths set correctly to pick up UVM Reg package yield two issues:

  1. Missing definitions for the version string defines.
  2. (after manually fixing the issue above) I get a syntax error (sorry I can’t remember the line at the moment, regarding an associative array with a ovm_object as the index key.

I suspect what is happening, is that something under the hood is set/changed when specifying -uvmhome which allows Incisive to build the full UVM package, but this option isn’t being set with -ovmhome. I can’t confirm this though.

I’ve spoken with Cadence AE’s about this since my original post and they claim that the UVM REG pacakge modified for OVM is not ported for Incisive, and to use either OVM with OVM_RGM, or straight out UVM. Unfortunately business reasons dictate we cannot move to UVM at this stage, so we are resorting to using OVM_RGM for our register package.

Anthony.

Amthony,

There is very little code in this kit that is not already part of UVM 1.1, which of course runs on all three simulators. That little code, designed to bridge/adapt UVM Reg to run on OVM, uses standard SystemVerilog. We did not intend for it not to run on IUS, but we had no way of testing on that platform.

If you identify which line(s) fail to compile, we will provide you a fix for you to try. Once you are up and running, we will then release an updated kit. I believe this approach better prepares you for the eventual transition to standard UVM.

Adam

When I use Questa 6.6d to compile the uvm_reg_pkg (I think I need to compile his?), I get compilation errors.

As follows:

Build uvm_reg kit
vlog -work …/sim/lib/mti/uvm_reg
-novopt
-L …/sim/lib/mti/ovm_212
+incdir+/cauldron/scotto/ovm2_1_2/ovm-2.1.2/src
+incdir+/cauldron/scotto/ovm_2_1_2_uvm_reg/uvm_reg-1.1/src
…/ovm_2_1_2_uvm_reg/uvm_reg-1.1/src/uvm_reg_pkg.sv

QuestaSim vlog 6.6d Compiler 2010.11 Nov 1 2010
– Compiling package uvm_reg_pkg
– Importing package /cauldron/scotto/svn_trunk/device/xpndr100g/official/branches/B_main/script/…/sim/lib/mti/ovm_212.ovm_pkg
** Error: /cauldron/scotto/ovm_2_1_2_uvm_reg/uvm_reg-1.1/src/uvm_reg_pkg.sv(111): near “ovm_sequence”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/ovm_2_1_2_uvm_reg/uvm_reg-1.1/src/uvm_reg_pkg.sv(111): Error in class extension specification.
** Error: /cauldron/scotto/ovm_2_1_2_uvm_reg/uvm_reg-1.1/src/uvm_reg_pkg.sv(114): super.new() call illegal for class with no super-class.

… etc for lines 119/122, 126/128, 178/180, 184/186 respectively.

Is there anything special that needs to be performed to compile the uvm_Reg_pkg to library?

ScottO

In reply to Pizadood:

Questa 6.6d is old, but should and does work for me. You did not show the step for compiling the OVM 2.1.2 package. Try compiling both packages in one vlog command line and see if that make a difference.

In reply to dave_59:

Thanks, I tried to combine the compilation, but it made no difference. :(

>>Compiling ovm(2.1.2)_base_pkg & uvm_reg_pkg
QuestaSim vlog 6.6d Compiler 2010.11 Nov 1 2010
– Compiling package ovm_pkg
– Compiling package uvm_reg_pkg
– Importing package ovm_pkg
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(111): near “ovm_sequence”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(111): Error in class extension specification.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(114): super.new() call illegal for class with no super-class.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(119): near “ovm_sequencer”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(119): Error in class extension specification.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(122): super.new() call illegal for class with no super-class.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(126): near “ovm_driver”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(126): Error in class extension specification.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(128): super.new() call illegal for class with no super-class.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(178): near “ovm_analysis_port”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(178): Error in class extension specification.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(180): super.new() call illegal for class with no super-class.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(184): near “ovm_analysis_imp”: syntax error, unexpected “IDENTIFIER”
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(184): Error in class extension specification.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/uvm_reg_pkg.sv(186): super.new() call illegal for class with no super-class.
** Error: /cauldron/scotto/svn_trunk/model/uvm_ovm_reg_pkg/uvm_reg-1.1/src/reg/uvm_reg_sequence.svh(111): near “#”: syntax error, unexpected ‘#’, expecting “IDENTIFIER” or ‘=’

In reply to Pizadood:

Hi Pizadood,
I remember Mentor AE telling me that UVM Register package compatibility with Questa is only from 6.6e. So you can try that version.

Hopefully any MGC engineers can comment on this.
Hope it helps you.
Thanks,
Rajkumar.

In reply to S.P.Rajkumar.V:

Questa 6.6d should compile the UVM register package with the OVM. There was just an example that didn’t work that needed 6.6e.

This error is very strange because ‘ovm_sequence’ is not recognized, but it is not the first OVM class to be used by the register package. Can you compile a simple OVM example using 2.1.2 that has an ovm_sequence? Are you able to get Questa 6.6e? BTW, Questa 10.0c comes with both packages pre-compiled.
If you cannot resolve your problems with these suggestions, you should contact Mentor support directly.

In reply to dave_59:

I tried Questa 10.0b and the same errors occurred. I agree that it is not a version issue.

Is 10.0c a super set of 6.6d?

In reply to Pizadood:

You will need to contact Mentor support directly. I have not been able to reproduce your problem with the kit on any version between 6.6d and 10.0c. 10.0c comes with pre-compiled packages, you just need to import the packages.

Dave

I encounter a compilation error when compiling uvm_reg_pkg. I am currently using Cadence irun/ncvlog 10.20.030. The error I get is regarding a queue vs. a dynamic array in uvm_reg_map, regarding `UVM_DA_TO_QUEUE(addrs,map_info.addr):

assignment operator type check failed (expecting datatype compatible with ‘queue of uvm_reg_addr_t (packed array of bit)’ but found ‘dynamic array of uvm_reg_addr_t (packed array of bit)’ instead)

Has anyone encountered this?

Hi Tom,

Will you be porting the register layer of UVM 1.1a to OVM in the (near) future?
There were quite a number of bug fixes and enhancements in this latest version.

Regards,
Steve

In reply to steve holloway:

Hi Steve,

We are discussing this now internally. We should be able give you a more definitive date soon.

Adam