Topics tagged macro

Topic	Replies	Views	Activity
Factory registration of 2-D array in UVM UVM macro	1	168	July 5, 2024
Index resolution in a macro used in a generate block SystemVerilog SystemVerilog , generate , macro , index	3	1560	May 12, 2021
Registration macros UVM UVM , uvm_object_utils , uvm_component_utils , macro	1	1000	April 7, 2021
Uvm_object_utils unexpected "SystemVerilog keyword 'typedef'" UVM SystemVerilog , UVM , macro	4	1819	March 15, 2021