Topics tagged hierarchy-reference

Topic	Replies	Views	Activity
Best way to dynamically access the same hierarchy cell in another module SystemVerilog SystemVerilog , hierarchy , hierarchy-reference	0	248	March 9, 2024
Hierarchical referencing of an upper hierarchy from a lower hierarchy SystemVerilog SystemVerilog , hierarchy-reference , hierarchical-referencing , absolute-reference	3	8077	January 20, 2018
Can uvm register model which support backdoor operation included in a package? UVM UVM , RAL , Package , uvm_reg-frontdoor-backdoor , hierarchy-reference	2	1736	May 1, 2014