Topics tagged cover-property

Topic	Replies	Views	Activity
Meaningful cover directive name Coverage Coverage , Assertions-using-Generate-Block , cover-property , SVA-checkers , cover-property-SVA	0	1261	May 16, 2019
Loop for the properties for dynamic signals in the interface SystemVerilog SystemVerilog , property , for-loop , Bus-interface , cover-property	2	2477	April 9, 2018
Coverage for a signal that's high for n clk cycles where n varies from 1 to 10? Coverage Coverage , cover-groups , coverage-sequence , coverage-system-verilog-cover-bins , cover-property	1	1487	April 26, 2017
Cover property issue SystemVerilog SystemVerilog , cover-property	2	1902	February 16, 2017

Meaningful cover directive name

Coverage , Assertions-using-Generate-Block , cover-property , SVA-checkers , cover-property-SVA

0

1261

May 16, 2019

Loop for the properties for dynamic signals in the interface

SystemVerilog , property , for-loop , Bus-interface , cover-property

2

2477

April 9, 2018

Coverage , cover-groups , coverage-sequence , coverage-system-verilog-cover-bins , cover-property

1

1487

April 26, 2017

Cover property issue

SystemVerilog , cover-property

2

1902

February 16, 2017