Topics tagged SystemVerilog-FunctionalCoverage

Topic	Replies	Views	Activity
Combining coverpoints SystemVerilog SystemVerilog , Coverage , cross , Coverage-bins , SystemVerilog-FunctionalCoverage	0	1069	March 7, 2019
Systemverilog cross coverpoint of a specific logical expression SystemVerilog SystemVerilog , cross-coverage , cross-coverage-of-logical-expression , SystemVerilog-FunctionalCoverage	1	2460	March 5, 2019
How to delete a bin from UCDB statistics? Coverage Coverage , SystemVerilog-FunctionalCoverage , coverage-ucdb , ucdb	1	1105	February 20, 2019
Multiple instances of covergroup using an array. How to connect "ref" signal in the class from an interface? Coverage Coverage , pass-by-reference , Covergroup-instance-for-an-array , array-of-covergroups , SystemVerilog-FunctionalCoverage	2	2415	February 9, 2019
Cover() failed for multiplication code Coverage Coverage , SystemVerilog-FunctionalCoverage	0	1317	February 6, 2019
Coverage of coverpoint SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage , get_coverage	2	2092	January 10, 2019
Can we create bins for a signal whose values are less than that of given threshold value Coverage Coverage , coverpoint , covergroup , SystemVerilog-FunctionalCoverage	1	1446	January 8, 2019
Coverage for an assertion SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage	2	981	January 5, 2019
Transition between bins Coverage Coverage , SystemVerilog-FunctionalCoverage , coverage-system-verilog-cover-bins	2	2956	December 12, 2018
Cross coverage exclude duplication SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage	3	1056	December 6, 2018
Signed numbers for coveragebin Coverage Coverage , SystemVerilog-FunctionalCoverage	3	3223	October 12, 2018
How do I write a coverpoint where part of a variable needs to stay constant and the other changes? SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage	3	866	September 25, 2018
Illegal_bins other = default Coverage Coverage , SystemVerilog-FunctionalCoverage	2	1825	September 5, 2018
Unable to ignore automatic bins Coverage SystemVerilog , Coverage , cross-coverage , SystemVerilog-FunctionalCoverage , cross-coverage-bins	3	1918	August 30, 2018
How to write Transition Coverage if the number of clock signals between the sampling signals are random Coverage Coverage , coverage-transition-bins , Transition-Coverage , SystemVerilog-FunctionalCoverage	0	1444	May 30, 2018
Unable to get cross coverage results written for reg model Coverage Coverage , SystemVerilog-FunctionalCoverage , Cookbook-CoverageFunctional-Coverage-Metrics , uvm-verilog	3	1631	May 18, 2018
Systemverilog cross coverage with intersect Coverage SystemVerilog , Coverage , SystemVerilog-FunctionalCoverage	1	15205	May 14, 2018
How to write array of coverpoints with a condition when each coverpoint should be sampled? Coverage Coverage , array-of-covergroups , SystemVerilog-FunctionalCoverage , Condition-for-sampling-covergroup	1	5031	April 15, 2018
Functional coverage Coverage Coverage , SystemVerilog-FunctionalCoverage	4	2270	January 8, 2018
Coverpoint array SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage	9	2579	December 5, 2017
Cover point for queue Coverage Coverage , UVM-system-verilog , SystemVerilog-FunctionalCoverage , Coverpoint-for-queue	1	2371	October 9, 2017
What is the number of test vectors required to test a priority encoder with “n” inputs? SystemVerilog SystemVerilog , test-vector , SystemVerilog-FunctionalCoverage	1	1945	October 1, 2017
Error of "non-illegal/ignore user-defined bins" while coding cross coverage? SystemVerilog SystemVerilog , cross-coverage , SystemVerilog-FunctionalCoverage	1	1194	May 8, 2017
Illegal expression within the binsof construct SystemVerilog SystemVerilog , cross-coverage , SystemVerilog-FunctionalCoverage	1	1877	May 8, 2017
Can we create a covergroup that can be instantiated number of times based on the number of channels we use? Coverage Coverage , covergroup , array-of-covergroups , SystemVerilog-FunctionalCoverage , multiple-instances-of-covergroups	3	4605	March 7, 2017
How can i have different comment for different instance of same coverage class SystemVerilog SystemVerilog , SystemVerilog-FunctionalCoverage	3	1237	March 6, 2017
How to write functional coverage for FSM (for both State coverage and Transition coverage) Coverage Coverage , SystemVerilog-FunctionalCoverage	4	5283	March 1, 2017
Testbench UVM UVM , Active-UVM-models , assertion-synthesis-checker-SystemVerilog , SystemVerilog-FunctionalCoverage	2	1405	February 9, 2017
How to write Functional Covergroup for byte, word, double-word in SV with 80bit wide data width? Coverage Coverage , SystemVerilog-FunctionalCoverage , generic-coverage , partial-write , memory-coverage	2	1839	January 30, 2017
SV transition coverage of non-contiguous values Coverage Coverage , SystemVerilog-FunctionalCoverage	1	2349	January 18, 2017