Topic	Replies	Views	Activity
The best way of using struct, class, and array SystemVerilog SystemVerilog , class , performance , simulation-performance	4	1466	October 24, 2022
Simulation performance massively degraded at top level testing UVM UVM , simulation-performance	4	883	June 13, 2022
Chip level simulation optimization UVM UVM , simulation-performance	6	1644	July 14, 2018
Problem with waveforms UVM UVM , waveform , simulation-performance , time , Cadence	1	2195	July 19, 2016
Does uvm_top.find() have impact of simulation time? UVM UVM , uvm_topfind , simulation-performance , simulation-profiling	8	4121	June 1, 2016

simulation-performance