Topics tagged inout

Topic	Replies	Views	Activity
Continuous assignment between two inout SystemVerilog inout , continuous-assignment	3	58	November 19, 2025
How to assign inout port into the interface of Systemverilog? SystemVerilog SystemVerilog , inout	4	2020	May 26, 2023
Inout port illegal connection error UVM SystemVerilog , UVM , error , inout	4	5951	July 1, 2019
I2C multiplexer SystemVerilog SystemVerilog , inout , I2C	0	1335	July 12, 2018
Inout default value SystemVerilog SystemVerilog , inout , task , default-value , argument	4	4135	November 22, 2017
Connecting INOUT 16-bit wire port in uvm_driver "Usage of 'micro_vi.ui_16bit_data' inconsistent with 'net' object." UVM UVM , inout , uvm_driver , inconsistent , net-object	1	1762	April 7, 2014