[SVA] signal rises and stays stable check -> how to write an assertion?

In the Ben’s last example, what will happen if the signal b never rise? In this case the assertion will never be ended and never will issue error… Correct?


initial begin
ap_a_init: assert property(##[10:20] rose(a) |=> a[*0:] ##1 $rose(b) );
end

Actually I need the signal a be checked for the stability after its rise until the signal b rises. If the signal b doesn’t rise then the stability check should be performed till end of the simulation. So, how to change the assertion in order to meet this requirement?