In reply to saritr:
Typically you `include files into a package instead of putting the file on the command line. Which file defines the package that defines paknx_transaction?
You may want to read http://go.mentor.com/package-import-versus-include
In reply to saritr:
Can you post the part of code from package where you are including pakmx_sequence.sv?
Also, along with uvm_pkg import, you should also have `include “uvm_macros.svh” as well.
In reply to dave_59:
In reply to saritr:
Typically you `include files into a package instead of putting the file on the command line. Which file defines the package that defines paknx_transaction?
You may want to read http://go.mentor.com/package-import-versus-include
In my pakmx_tb_top I do the following:
module pakmx_tb_top;
import uvm_pkg::*;
`include “uvm_macros.svh”
In the script file (run_src.bat) I do:
vmap work work
vlog +incdir+./uvm-1.2/src ./uvm-1.2/src/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA
vlog -vs +incdir+./uvm-1.2/src/uvm_macros.svh
vlog design_hdl/packet_mux.sv
vlog pakmx_if.sv
vlog pakmx_config.sv pakmx_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv pakmx_pkg.sv pakmx_tb_top.sv
In reply to mayurkubavat:
In reply to saritr:
Can you post the part of code from package where you are including pakmx_sequence.sv?
Also, along with uvm_pkg import, you should also have `include “uvm_macros.svh” as well.
Please see my answer to dave_59
In reply to saritr:
Hi,
Please check for the errors in your pakmx_config.sv (like missing endclass or missing guards etc) because sometimes I faced an issue of such kind due to the errors in the previous compiled files(If you think every think is imported properly and put in a package).
In reply to Anudeep J:
In reply to saritr:
Hi,
Please check for the errors in your pakmx_config.sv (like missing endclass or missing guards etc) because sometimes I faced an issue of such kind due to the errors in the previous compiled files(If you think every think is imported properly and put in a package).
That’s what I have in the config file:
class pakmx_config extends uvm_object;
`uvm_object_utils(pakmx_config)
function new(string name = "");
super.new(name);
endfunction: new
endclass: pakmx_config
In reply to saritr:
You can experiment that with separate vlog statements. If not working, compile all files with single vlog command.
A clean way is to create a file, say tb.f/tb.txt/tb.anything
tb.f content,
+incdir+./uvm-1.2/src
./uvm-1.2/src/uvm_pkg.sv
./uvm-1.2/src/dpi/uvm_dpi.cc
./testbench_pkg.sv
pakmx_if.sv
design_hdl/packet_mux.sv
And use command:
vlog -f tb.f -ccflags -DQUESTA
to compile.
In reply to mayurkubavat:
I prefer the dirst option you have suggested.
I wrote in the compile script the following:
vmap work work
vlog +incdir+./uvm-1.2/src ./uvm-1.2/src/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA\ pakmx_config.sv pakmx_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv pakmx_pkg.sv pakmx_tb_top.sv
vlog -vs +incdir+./uvm-1.2/src/uvm_macros.svh
vlog design_hdl/packet_mux.sv
vlog pakmx_if.sv
but I still got errors.
In reply to mayurkubavat:
In reply to saritr:
Can you go with other two approaches, which is not using vlog command multiple times.
In this case, when we compile all test files first, pakmx_tb_top.sv file also requires DUT and Interface as well, and that is being compiled with later vlog commands.
Or use this,
vlog ./design_hdl/packet_mux.sv pakmx_if.sv +incdir+./uvm-1.2/src ./uvm-1.2/src/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA pakmx_config.sv pakmx_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv pakmx_pkg.sv pakmx_tb_top.sv
with one use of vlog command. No need to use
vlog -vs +incdir+./uvm-1.2/src/uvm_macros.svh
now.
I did the following:
vmap work work
vlog ./design_hdl/packet_mux.sv pakmx_if.sv +incdir+./uvm-1.2/src ./uvm-1.2/src/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA pakmx_config.sv pakmx_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv pakmx_pkg.sv pakmx_tb_top.sv
Still the same errors
In reply to mayurkubavat:
It’s more or less confusing what you are doing. I gues you are looking for a general approach how to compile a UVM environment. To get such an approach you should pack together what belongs together, i.e. having packages for all agents, test, and the top_tb. These are the 3 main parts of your UVM environment.
Download from my webpage www.christoph-suehnel.de a running example and look in the sim-directory for a the compile-script compile.do. Follow the instructions there.
BTW +incdir+ has to point to a folder and not to a file.
In reply to saritr:
Can you post the error message?
Correction:
Compiling class files has no point here. Only compile files which are modules(module, package, interface.) with vlog command. And include all class files in top module or package.
In reply to mayurkubavat:
In reply to saritr:
Can you post the error message?
Correction:
Compiling class files has no point here. Only compile files which are modules(module, package, interface.) with vlog command. And include all class files in top module or package.
C:\pk_mux>run_scr.bat
C:\pk_mux>vmap work work
Model Technology ModelSim PE vmap 10.4c Lib Mapping Utility 2015.07 Jul 20 2015
vmap work work
Modifying modelsim.ini
C:\pk_mux>vlog ./design_hdl/packet_mux.sv pakmx_if.sv +incdir+./uvm-1.2/src ./uv
m-1.2/src/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA pakmx_config
.sv pakmx_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv
pakmx_pkg.sv pakmx_tb_top.sv
Model Technology ModelSim PE vlog 10.4c Compiler 2015.07 Jul 20 2015
Start time: 09:31:36 on Aug 02,2016
vlog ./design_hdl/packet_mux.sv pakmx_if.sv “+incdir+./uvm-1.2/src” ./uvm-1.2/sr
c/uvm_pkg.sv ./uvm-1.2/src/dpi/uvm_dpi.cc -ccflags -DQUESTA pakmx_config.sv pakm
x_sequence.sv pakmx_agent.sv pakmx_env.sv pakmx_test.sv pakmx_driver.sv pakmx_pk
g.sv pakmx_tb_top.sv
– Compiling module packet_mux
– Compiling interface pakmx_if
– Compiling package uvm_pkg
** Warning: ./uvm-1.2/src/seq/uvm_sequencer_base.svh(1499): (vlog-2186) SystemVe
rilog testbench feature
(randomization, coverage or assertion) detected in the design.
These features are only supported in Questasim.
** Warning: ./uvm-1.2/src/seq/uvm_sequencer_base.svh(1662): (vlog-2186) SystemVe
rilog testbench feature
(randomization, coverage or assertion) detected in the design.
These features are only supported in Questasim.
** Warning: ./uvm-1.2/src/seq/uvm_sequence_base.svh(1333): (vlog-2186) SystemVer
ilog testbench feature
(randomization, coverage or assertion) detected in the design.
These features are only supported in Questasim.
** Error: (vlog-13069) pakmx_config.sv(2): near “uvm_object”: syntax error, unex
pected IDENTIFIER.
** Error: pakmx_config.sv(2): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “uvm_sequence_item”: syntax erro
r, unexpected IDENTIFIER.
** Error: pakmx_config.sv(5): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “uvm_agent”: syntax error, unexp
ected IDENTIFIER.
** Error: pakmx_config.sv(5): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “uvm_env”: syntax error, unexpec
ted IDENTIFIER.
** Error: pakmx_config.sv(5): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “uvm_test”: syntax error, unexpe
cted IDENTIFIER.
** Error: pakmx_config.sv(5): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “uvm_driver”: syntax error, unex
pected IDENTIFIER.
** Error: pakmx_config.sv(5): Error in class extension specification.
** Error: (vlog-13069) pakmx_config.sv(5): near “#”: syntax error, unexpected '#
', expecting class.
** Error: pakmx_tb_top.sv(5): Illegal use of ‘automatic’ for variable declaratio
n (rst).
** Error: pakmx_tb_top.sv(5): Illegal use of ‘automatic’ for variable declaratio
n (clk).
** Error: (vlog-13069) pakmx_driver.sv(5): near “(”: syntax error, unexpected '(
', expecting class.
– Compiling DPI/PLI C++ file ./uvm-1.2/src/dpi/uvm_dpi.cc
./uvm-1.2/src/dpi/uvm_hdl_questa.c: In function ‘int uvm_hdl_set_vlog_partsel(ch
ar*, t_vpi_vecval*, PLI_INT32)’:
./uvm-1.2/src/dpi/uvm_hdl_questa.c:111: warning: control reaches end of non-void
function
./uvm-1.2/src/dpi/uvm_hdl_questa.c: In function ‘int uvm_hdl_get_vlog_partsel(ch
ar*, t_vpi_vecval*, PLI_INT32)’:
./uvm-1.2/src/dpi/uvm_hdl_questa.c:172: warning: control reaches end of non-void
function
End time: 09:31:38 on Aug 02,2016, Elapsed time: 0:00:02
Errors: 16, Warnings: 3
In reply to chr_sue:
In reply to mayurkubavat:
It’s more or less confusing what you are doing. I gues you are looking for a general approach how to compile a UVM environment. To get such an approach you should pack together what belongs together, i.e. having packages for all agents, test, and the top_tb. These are the 3 main parts of your UVM environment.
Download from my webpage www.christoph-suehnel.de a running example and look in the sim-directory for a the compile-script compile.do. Follow the instructions there.
BTW +incdir+ has to point to a folder and not to a file.
From where exactly I have to download the example?
In reply to saritr:
Go with this approach,
- Include all your testbench class files in a package, import this package in top module. And you need to compile this package with top module and interface.
Or 2) If you are compiling tb class files with vlog, you need to import uvm_pkg globally, outside module. e.g.
import uvm_pkg::*;
`include "uvm_macros.svh"
module pakmx_tb_top;
//Code
endmodule //pakmx_tb_top
In reply to saritr:
Download from the Resorces-tab. Scroll down there and you will see a link ‘zip-file’.
Click there and the download will start.
In reply to saritr:
You need to read the article that Dave pointed you to concerning packages.
You should not be compiling the individual class files.
Instead you should use a package file to encapsulate all of your agent’s class files:
File pakmx_pkg.sv:
package pakmx_pkg.sv
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "pakmx_config.sv"
`include "pakmx_sequence.sv"
`include "pakmx_agent.sv"
`include "pakmx_env.sv"
`include "pakmx_test.sv"
`include "pakmx_driver.sv"
endpackage
Only compile the pakmx_pkg.sv file. DO NOT compile the individual files.
My guess is that you will still get errors because the include is order dependent.
In reply to cgales:
Can you explain me the adventage/motivation of using pkg instead of compile the indicidual class files?
In reply to saritr:
You really need to read the article that Dave points to in his above response. You should also read the Verification Horizons article that is also mentioned. They will explain all the reasons you should be using packages.
Hi,
i’am new in uvm
import uvm_pkg::*;
include "uvm_macros.svh" include “shift_register.sv”
include "shift_register_intf.sv" //include “shift_register_uvm_pkg.sv”
module shift_tb_top();
import shift_register_uvm_pkg::*;
shift_register_intf shift_intf();
bit clk;
bit[7:0] si;
bit rst;
bit so;
bit[7:0] temp1;
bit[7:0] temp2;
shift_register dut(.clk(shift_intf.clk),.si(shift_intf.si),.rst(shift_intf.rst),.temp1(shift_intf.temp1),.temp2(shift_intf.temp2),.so(shift_intf.so));
initial begin
uvm_config_db#(virtual shift_register_intf)::set(null,“*”,“shift_register_intf”,shift_intf);
run_test("shift_register_test");
end
initial begin
$wlfdumpvars();
end
endmodule
but get the error.pls give ideaStart time: 11:50:59 on Aug 02,2017
vlog shift_tb_top.sv
** Note: (vlog-2286) Using implicit +incdir+/tools/mentor/Questa_10.3c_ultra/questasim/uvm-1.1d/…/verilog_src/uvm-1.1d/src from import uvm_pkg
– Compiling interface shift_register_intf
** Error: shift_tb_top.sv(10): (vlog-13006) Could not find the package (shift_register_uvm_pkg). Design read will continue, but expect a cascade of errors after this failure. Furthermore if you experience a vopt-7 error immediately before this error then please check the package names or the library search paths on the command line.