Topics tagged package-variable-uvm

Topic	Replies	Views	Activity
UVM Driver needs to do 100(`MAX_TRANS) transactions in which the address needs to transfer every posedge clock cycle and the data needs to transfer every four cycles(`MAX_WAIT). I tried the below sample code, but didn't get it to work UVM UVM , assertion , package-variable-uvm	3	802	September 10, 2022
Is ther any method to generate and drive 1bit serial complex input stimulus? UVM UVM , uvm-uvm_driver- , package-variable-uvm , model-uvm-reference_model	1	588	November 8, 2021
Variable and fucntion/task defined in one package but import in mutiple files, the variable and function/task is same object in the mutile different place? SystemVerilog SystemVerilog , package-variable-uvm	2	610	March 12, 2021