Topics tagged Xilinx

Topic	Replies	Views	Activity
Where can I get documetation of axi bus protocol? UVM UVM , Xilinx	3	1901	August 15, 2016
Problem with DUT DDR input -> SDR output OVM OVM , Verification , modelsim , Xilinx , unisim , ddr	1	2429	March 11, 2016
Running Regression tests UVM UVM , simulation-Terminate , regressions , initialization , Xilinx , running-multiple-testcases-in-sv	3	4760	January 14, 2016

Where can I get documetation of axi bus protocol?

UVM , Xilinx

3

1901

August 15, 2016

Problem with DUT DDR input -> SDR output

OVM , Verification , modelsim , Xilinx , unisim , ddr

1

2429

March 11, 2016

Running Regression tests

UVM , simulation-Terminate , regressions , initialization , Xilinx , running-multiple-testcases-in-sv

3

4760

January 14, 2016