Hello, I created a register layer within an env as below.
reg_model = `RAL_MODEL::type_id::create("reg_model");
reg_model.build();
reg_model.set_hdl_path_root(hdl_path);
reg_model.set_coverage(UVM_NO_COVERAGE);
`uvm_info("build_phase", "Reg Model created", UVM_LOW)
reg_model.lock_model();
I passed “hdl_path” (to dut) from base test which has env and, env get as below
if (!uvm_config_db#(string)::get(null, get_full_name(), "hdl_path", hdl_path))
`uvm_fatal("",$sformatf("hdl_path is not set for reg_model %s",get_full_name()))
Due to test requirement, I need to replicate this env in the base test for a second dut. So, in the base test, I created another env with a different handle and another uvm_config_db set to pass hdl_path of second dut. However, I am getting aforementioned error in the title.
Why do reg_model name to be unique when they have different hierarchical path? Any suggestion for a workaround would be very helpful. Thank you for your time.