Uvm_object_utils unexpected "SystemVerilog keyword 'typedef'"

In reply to dave_59:

ifndef NAME_OF_SEQ_ITEM_SV define NAME_OF_SEQ_ITEM_SV

import uvm_pkg::*;
`include “uvm_macros.svh”

class uvm_csv_packet_item extends uvm_sequence_item

`uvm_object_utils(uvm_csv_packet_item)

Above is the code up to the line that is reporting the error. I have removed the comments for simplicity.

The line with the uvm_object_utils macro is what is giving me this error.