Smallest program code using uvm

UVM
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1

Can anyone write a small program using uvm?
CONSTRAINTS:
The program may or maynot contain the dut for verification.(if possible)
The program may or maynot contain the hierarchical list of components.(if possible)

2

In reply to kireeti1192:

Visit the Doulos webpage on
https://www.doulos.com/knowhow/sysverilog/uvm/easier/

This helps you to generate your UVM environment automatically and it has several examples including simple DUTs.

3

In reply to chr_sue:

Thanks for your information.

I found the smallest program in this link:

4

In reply to kireeti1192:

Unfortunately this is nothing what runs and it has only a env inside and nothing real useful thing.

5

In reply to kireeti1192:

Can anyone write a small program using uvm?
CONSTRAINTS:
The program may or maynot contain the dut for verification.(if possible)
The program may or maynot contain the hierarchical list of components.(if possible)

I am glad that you replied to my question. I need only minimum line UVM code irrespective of the usage of code.

6

In reply to kireeti1192:

But the minimu is more as what you have seen.
Again, go to the link https://www.doulos.com/knowhow/sysverilog/uvm/easier/
Downlaod the Code Generator and you’ll also get a few environments ready for simulation.

7

There are the two best approaches to starting with the smallest UVM Reference Design:

Start by implementing a very simple UVM testbench with a simple COUNTER DUT or MEMORY DUT.

Follow these two procedures:

  1. Basic UVM | Universal Verification Methodology | Verification Academy

  2. UVM Framework | Verification Academy

Here is an excellent detailed description of the Minimum UVM Code Templates (of Classes, Methods, Macros) required to implement UVM:
https://verificationacademy.com/sessions/dvcon-2015/paper-presentation/UVM-Rapid-Adoption-A-Practical-Subset-of-UVM

The UVM Cookbook has many small examples with documentation explaining each example. Code Example Downloads | Verification Academy