In reply to GC:
Where can I check the implementation of the inbuilt uvm ral sequences like uvm_reg_hw_reset_seq ?
I don’t understand what has gone wrong here.
The error comes as follows so I think I might need to check uvm-1.1d implementation of these sequences, where can I get this code ?
UVM_ERROR verilog_src/uvm-1.1d/src/reg/uvm_reg.svh(2889) @ 345000: reporter [RegModel] Register "m_ral_model.xxxxx_REG" value read from DUT (0x0000000000000035) does not match mirrored value (0x00000000xxxx0000)