Mirrored value doesn't match the desired value while running default sequence uvm_reg_hw_reset_seq in ral test

In reply to chr_sue:
I just tried adding it right before starting the sequence as you suggested but it shows the same error.

In the reg model I see the reset value is configured correctly as follows :

 xxxx.configure(this, 16, 0, "RW", 0, 16'h0035, 1, 1, 1);

The waves also show the correct value, I am just confused why is it throwing the error about the mirrored and desired value mismatch.