For loop in system verilog

SystemVerilog
,
1

I am using a for loop to assign a bit blasted signal to its vector as follows:
for (int i=0;i<=255;i++)
primary_sig[i] = test_bench.dut.u_top.u_chip_core_top.u_security_control_wrapper.u_security_control.\primary_sig[i] ;

But I am getting error. Can anyone pls help me why this loop is not working and what to do

2

In reply to ibrahim_hussain:

will generate block be useful here?

3

In reply to ibrahim_hussain:

Can you post some more information about the error your are getting? Where are you trying to do this statement? In a module? SV class? The more information you can post, the better answers you will receive.

4

In reply to cgales:

Hi Ibrahim,

As cgales mentioned, post the errors your getting. Have a doubt on ur post.
primary_sig[i] = test_bench.dut.u_top.u_chip_core_top.u_security_control_wrapper.u_security_control.****primary_sig[i] ;
Does it is typo or \ is necessary in that point?

5

When a signal array gets blasted into individual signal bits, like \primary_sig[0], \primary_sig[1], \primary_sig[3], etc, you cannot use a variable to index into that signal because it is no longer an array. Because of the , all the characters that follow become part of the signal name and the [0] at the end of the name has lost its meaning and is just part of the identifier name.

You will have to manually access each bit, or use a script to generate the code

primary_sig[0] = test_bench.dut.u_top.u_chip_core_top.u_security_control_wrapper.u_security_control.\primary_sig[0] ;
primary_sig[1] = test_bench.dut.u_top.u_chip_core_top.u_security_control_wrapper.u_security_control.\primary_sig[1] ;
6

In reply to dave_59:

Thanks Dave. I got your point. Actually these are the bit blasted signals of the netlist which I am trying to assign to a vector. So rather than making assignment bit by bit and to reduce the code size I wanted to use some loop but I understand is no way to run any kind of loop to perform this task.

7

In reply to ibrahim_hussain:

Dave it will be very useful if you help me in any way of scripting or automation which I can use in my SV class to solve this issue. Thanks in advance

8

In reply to ibrahim_hussain:

Use a PERL script.