Error-[SE] Syntax error
Following verilog source has syntax error :
Token ‘uvm_component’ should be a valid type. Please check whether
it is misspelled, not visible/valid in the current context, or not properly
imported/exported.
“sim/env/src/user_defined_pkg.sv”, 103: token is ‘;’
class global_checker extends uvm_component;
please someone help us to solve the issue.
In reply to rajan k:
It indicates that, uvm_package is not imported successfully. can you paste the code, where you’re importing it?
In reply to rajan k:
Did you import uvm_pkg::*;
?
In reply to rajan k:
Could you please show a piece of code relating to the import and file where you are getting this error.
In reply to rajan k:
If you have imported the uvm_pkg inside another package, the scope of the uvm_pkg will be limited to that package only. In that case, you’d have to import the uvm_pkg again inside your env to let compiler include all the UVM library class within the score of your env.
Refer to the uvm_cookbook for further understanding of package import.
class seq_item extends uvm_sequence_item;
rand bit [3:0] a;
rand bit [3:0] b;
rand bit [1:0] mode;
bit [7:0] out;
uvm_object_utils_begin(seq_item) uvm_field_int (a,UVM_ALL_ON)
uvm_field_int (b,UVM_ALL_ON) uvm_field_int (mode,UVM_ALL_ON)
uvm_field_int (out,UVM_ALL_ON) uvm_object_utils_end
function new (string name=“seq_item”);
super.new(name);
endfunction
endclass
Error-[SE] Syntax error
Following verilog source has syntax error :
Token ‘uvm_sequence_item’ should be a valid type. Please check
whether it is misspelled, not visible/valid in the current context, or not
properly imported/exported.
“seq_item.sv”, 1: token is ‘;’
class seq_item extends uvm_sequence_item;
^
Please help me identify the error the the reason.?
In reply to C Anudeep Varma:
You did not import the uvm_pkg. I believe it is useless what you are doing.
Please watch the videos about UVM basics and how to package UVM code.and ask your tool provider how to compile UVM code.
In reply to chr_sue:
oh… actually I imported the uvm_pkg but still I am getting the error, i am a bit new to UVM so need a bit more detailed help please.
In reply to C Anudeep Varma:
Please show some code.
In reply to dave_59:
Hello,
getting the error when my env ironment is compiled
Error-[SE] Syntax error
Following verilog source has syntax error :
Token ‘uvm_driver’ should be a valid type. Please check whether it
is misspelled, not visible/valid in the current context, or not properly
imported/exported.
“axi_driver.sv”,
3: token is ‘;’
class axi_driver extends uvm_driver;
I imported the package in top module and used packages for env and seq components
module top;
CODE:
import uvm_pkg::;
`include “uvm_macros.svh” //UVM Library Package
import seq_pkg::;
import env_pkg::*;
please suggest,not sure of reason
In reply to ramankaur09:
2 things:
(1) you do not show how you are packaging your driver/monitor etc.
(2) your driver has to be parameterized with your seq_item like this
class axi_driver extends uvm_driver(axi_item);
In reply to chr_sue:
Hello,
yes i had added the sequence_item to driver but as it was not taking uvm_sequence definition i tried to remove it and check.
when i manually added two lines for import uvm_pkg::*
`include “uvm_macros.svh”
it works, but is there any need to include these in every class, or only in top module and test class, thnks
In reply to ramankaur09:
The unm_pkg is adding all UVM base classes to your code and the include statement is providing all macros of the UVM.
If you compile a UVM-based class this is needed.
To avoid these import/include for each class you should packkage all your agent code files into a package and import and include then only for the package. This makes your code also reusable.