In reply to dave_59:
Hello,
getting the error when my env ironment is compiled
Error-[SE] Syntax error
Following verilog source has syntax error :
Token ‘uvm_driver’ should be a valid type. Please check whether it
is misspelled, not visible/valid in the current context, or not properly
imported/exported.
“axi_driver.sv”,
3: token is ‘;’
class axi_driver extends uvm_driver;
I imported the package in top module and used packages for env and seq components
module top;
CODE:
import uvm_pkg::;
`include “uvm_macros.svh” //UVM Library Package
import seq_pkg::;
import env_pkg::*;
please suggest,not sure of reason