Dynamic nonconsecutive repition

SystemVerilog
,
1

Hello
I am designing dynamic nonconsecutive repetition that can receive variables.

I’m designing it by referring to the code on this site.
But I have a lot of difficulties and I ask for your help.

// #count
// ex) #count
sequence dynamic_delay(count);
int v;
(count<=0) or ((1, v=count) ##0 (v>0, v=v-1) [+] ##1 v<=0);
endsequence

sequence nonconsecutive(sq1,count);
int v;
(1,v=count) ##0
(v <=0 and !sq1) or ( v>0 ##[] sq1, v=v-1) [+] ##0 v<=0) ##1 !sq1[];
endsequence

sequence nonconsecutive_sub(sq1,count);
int v;
(1,v=count) ##0
(v <=0 and !sq1) or ( v>0 ##[*] sq1, v=v-1) [+] ##0 v<=0) ;
endsequence

// ##nonconsecutive range
// ex) sq1[=m:n] #Delay sq2

sequence nonconsecutive_range(sq1, m, n);
int v,diff,count;
(1, count = m,diff = n-m) ##0
nonconsecutive_sub(sq1,count) ##0
first_match((diff > 0 ##[] sq1, diff = diff - 1)[+]) ##1 !sq1[] ;
endsequence

In the range, if I use first_match on the diff variable, sequence occurs fail only looking at the first clock.

@(posedge clk) disable iff(!resetn||$isunknown(resetn)) (~$isunknown(start)&&$rose(start)) |=> nonconsecutive_range(val,check_data,check_data2) ##3 val2

Are there other design methods?

2

In reply to Aaron:
See my package on dynamic delays, which also includes a TB.
https://verificationacademy.com/forums/systemverilog/sva-package-dynamic-and-range-delays-and-repeats

// ##count 
// ex) ##count
/*sequence dynamic_delay(count); // Your code
        int v;
        (count<=0) or ((1, v=count) ##0 (v>0, v=v-1) [+] ##1 v<=0);
endsequence*/
// My code 
 //----------------------------------------------------------------
    // ******       DYNAMIC DELAY ##d1 **********
    // Implements     ##[d1] 
    // Application: sq_1 ##0 dynamic_delay(d1) ##0 sq_2;
    sequence dynamic_delay(count);
        int v;
      (count<=0) or ((1, v=count) ##0 (v>0, v=v-1) [*0:$] ##1 v<=0);
    endsequence // dynamic_delay
/* Your code 
sequence nonconsecutive(sq1,count); 
       int v;
       (1,v=count) ##0
       (v <=0 and !sq1) or ( v>0 ##[*] sq1, v=v-1) [+] ##0 v<=0) ##1 !sq1[*]; 
endsequence */ 


sequence nonconsecutive_sub(sq1,count); 
       int v;
      (1,v=count) ##0
      (v <=0 and !sq1) or ( v>0 ##[*] sq1, v=v-1) [+] ##0 v<=0) ; 
endsequence


// ##nonconsecutive range
// ex) sq1[=m:n] ##delay sq2

sequence nonconsecutive_range(sq1, m, n);
       int v,diff,count;
      (1, count = m,diff = n-m)                 ##0 
      nonconsecutive_sub(sq1,count)             ##0 
      first_match((diff > 0 ##[*] sq1, diff = diff - 1)[+]) ##1 !sq1[*] ;          
endsequence */
  //----------------------------------------------------------------
    // ******       DYNAMIC DELAY RANGE ##[d1:d2] **********
    // Implements     ##[d1:d2] ##0 a_sequence 
    // for use in consequent 
    // Application:  $rose(a)  |-> dynamic_delay_lohi_sq(d1, d2, q) ;
    sequence dynamic_delay_lohi_sq(d1, d2, sq);
        int v1, vdiff;
          ( (1, v1=d1, vdiff=d2-d1) ##0 dynamic_delay(v1)   ##0     
              (vdiff>=0, vdiff=vdiff - 1)[*1:$] ##0 sq); 
    endsequence
 
    sequence dynamic_delay_fm_lohi_sq(d1, d2, sq);
            int v1, vdiff;
             first_match( (1, v1=d1, vdiff=d2-d1) ##0 dynamic_delay(v1)   ##0     
                  (vdiff>=0, vdiff=vdiff - 1)[*1:$] ##0 sq); 
    endsequence // dynamic_delay_fm_lohi_sq

Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
** SVA Handbook 4th Edition, 2016 ISBN 978-1518681448
…

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