Does type_id::create() end up eventually call the class's new function?

Hi all, I kindly require help on the following. Assume I have a class as follows


class abc extends uvm_object; // a kind of config class
    `uvm_object_utils(abc)

  config_class config_h;

  function new(string name = "abc");
    config_h.a = 5;
  endfunction
endclass


and another class as follows:


class def extends uvm_test; // base test for the environment
  `uvm_component_utils(def)

  config_class config_h;

  function void build_phase(uvm_phase phase);
    // Assume that config_class handle config_h has already been created using type_id::create, and is set in uvm_config_db
    abc_handle = abc::type_id::create("abc_handle"); // -> does this execute the "new()"  constructor in config_class?
    uvm_config_db #(abc)::set(this, "*", "abc_handle", abc_handle);
    abc.config_h = config_h;
   endfunction
endclass


I see a null object access error on the line config_h.a = 5. Is this because this line of code is executed before the handle is assigned to the class?

In reply to vk7715:

There are several issues here.

  • The only way to construct an object in SystemVerilog is by calling new(). Just add a $display statement in the constructor to see when it is called.
  • A ‘null object access error’ means you are using an uninitialized handle. Either step through the code with a debugger or print the value of the handles before line 5 with %p:
$display("config_h=%p", config_h);
  • The last line of the build_phase() won’t compile. ‘abc’ is a class name, not a handle.

To add to Chris’s response

  • You are missing constructor declaration within class ‘def’
  • Call to super.new(name) is missing in constructor of class ‘abc’

In reply to chrisspear:

In reply to vk7715:
There are several issues here.

  • The only way to construct an object in SystemVerilog is by calling new(). Just add a $display statement in the constructor to see when it is called.
  • A ‘null object access error’ means you are using an uninitialized handle. Either step through the code with a debugger or print the value of the handles before line 5 with %p:
$display("config_h=%p", config_h);
  • The last line of the build_phase() won’t compile. ‘abc’ is a class name, not a handle.

Hi Chris, thank you for your reply.
I also would like to know the answer to another question I had in the comments, does calling type_id::create end up calling the “new” constructor of that class?

Example, does abc::type_id::create(“abc_handle”); call “new” function in class abc?

In reply to vk7715:

That’s why I said to put a $display() in abc::new() so you can see for yourself. If you have access to a good debugger, you can try stepping through the create() call, but it goes deeper than the Titanic, so you might be there for a while. :-)

In reply to chrisspear:

In reply to vk7715:
That’s why I said to put a $display() in abc::new() so you can see for yourself. If you have access to a good debugger, you can try stepping through the create() call, but it goes deeper than the Titanic, so you might be there for a while. :-)

Hi Chris,

I put a $display() and saw for myself – type_id::create calls ‘new’ of the class. Thank you.

On a side note, what debugger do you recommend for stepping through UVM code? And are there any tutorials teaching the same?

Thanks

In reply to vk7715:

https://verificationacademy.com/sessions/interactive-debug-techniques-for-uvm-systemverilog-and-rtl-using-visualizer

In reply to dave_59:

Thank you so much Dave!