Assigning queues in system verilog

I have to execute an following Queue model in my system verilog testbench and it’s showing an error as (define int h[8]= {0,1,2,3,4,5,6,7} as constant type) And I have tried everything to solve the error but nothing is working out.I hope that you guys ca help me out. My code looks something like this

      int h[8]= {0,1,2,3,4,5,6,7};	
                begin	
                for(int n = 0; n<8; ++n)begin
                 int sum = 0;
                for(int k = 0; k<n; ++k)begin
                sum += h[k]*x[n-k];
		end
               end
              end

In reply to confused kid:
There are no queues in the example you posted. Please try to give us a complete self-contained example that someone can try to run and help you.

In reply to confused kid:

This is not a queue. It is a fixed size array. You have to elaborate the issue. For the current implementation as shown, use a tick (') before assigning the values as follows:

int h[8]= '{0,1,2,3,4,5,6,7}; // ' before assignment

[i]In reply to dave_59:

I’m new in this system verilog concept and I’m sorry for the confusion. I wanted to change the value of h[k] for each clock cycles until 16 clock cycles and I wanted to do something like this
sum = 0x[n-k] for first clock cycle
sum = 0
x[n-k] + 1*x[n-k] for second clock cycle
and so on for 16 clock cycles

  int h[k]= {0,1,2,3,4,5,6,7};	
                begin	
                for(int n = 0; n<8; ++n)begin
                 int sum = 0;
                for(int k = 0; k<n; ++k)begin
                sum += h[k]*x[n-k];
		end
               end
              end

In reply to confused kid:
It’s difficult to teach you SystemVerilog in a forum. I suggest you take some tutorials first, and then go back to your problem.
And you are not being very clear in your questioning. The only difference between the code in you second post is you change int h[8] to int h[k]. Do you mean to be using a subscript hk? You can’t write that in your source code. And now you bring up clock cycles, which you never mentioned in your original question.

In reply to dave_59:

Hi Dave,

Thanks, I’m sorry for not posting the question in the right way at the first place only because It’s my first time posting questions in any forum.

And yeah Is their any way I can execute summation in system verilog which has subscripts like h[k] and x[n-k] because I was able to execute similar problem in other languages like c,c++ and python

In reply to confused kid:
Here’s what I mean by a complete self-contained example using your original post and adding the necessary code to compile and run it.

module top;
   int h[8]= {1,2,3,4,5,6,7,8}; // I'm assuming these numbers are arbitrary	
   int x[8]= {1,2,3,4,5,6,7,8}; // You never showed this declaration
   int sum;
   initial begin	
      for(int n = 0; n<8; ++n)begin
	 sum = 0;
	 for(int k = 0; k<=n; ++k)begin
            sum += h[k]*x[n-k];
	 end
	 $display(n,, sum); // I added this for debugging
      end
   end
endmodule

And here is the output I get:

# run -all
#           0           1
#           1           4
#           2          10
#           3          20
#           4          35
#           5          56
#           6          84
#           7         120
#  quit -f

Can you show us in C the same thing you are trying to write in SystemVerilog?

In reply to dave_59:

Hi Dave,

I wrote the code in c++ something like this

#include <iostream>
using namespace std;
int main(){
        int h[8]= {0,1,2,3,4,5,6,7};
	int x[8] = {1,2,1,1,2,2,1,0};
        int y[8] = {0};
        for(int i:y)
        while(--i > 0){
		for(int n = 0; n < 8; ++n){
		int sum = 0;
		for(int k = 0; k < n; ++k){
			sum += h[k]*x[n-k];
		}
		y[n]= sum;
	}
	for(int i:y)
		cout<< i<< endl;
	}
	
}

In reply to confused kid:
Hi Dave,
if i want to randomize the fixed array how can I do that. I mean in the above example if i want to randomize h[k] or x[k]. How Can I do that?? I mean Can I just create a class such as

Class random;
rand bit[7:0] b;
end class

int h[8] = { b };
int x[8] = {1,2,3,4,5,6,7,8};

will it work???

In reply to confused kid:
I am trying to help you, but you are making it very difficult and not putting enough effort to show working code and expected output. Your C++ code produces no output because y is all 0 and you are iterating over
for(int i;y)
. Also, the code you just showed now has 4 nested loops, but your original code had only 2. Anyways, here is the your non-working code translated to SystemVerilog

module top;
   
   int h[8]= {0,1,2,3,4,5,6,7};
   int x[8] = {1,2,1,1,2,2,1,0};
   int y[8] = '{default:0};
   
initial
  foreach(y[ii]) begin : loop1
     int i;
     i = y[ii];
     while(--i > 0) begin : loop2
	for(int n = 0; n < 8; ++n) begin : loop3
	   automatic int sum = 0;
	   for(int k = 0; k < n; ++k)begin : loop4
	      sum += h[k]*x[n-k];
	   end : loop4
	   y[n]= sum;
	end : loop3
	foreach(y*) $display(y[i]);
     end : loop2
  end : loop1
   
endmodule : top

The foreach loop replaces C++ range-based for loop.
By default, all variable declarations outside of classes are static variables. If you want a loop variable initialized each time through the loop, you have to declare them as automatic, or split the declaration and initialization into separate lines.
I added optional block labels to make the code easier to follow (loop1,…)

[i]In reply to confused kid:*
You don’t have to put variables in a class to randomize them, you can call std::randomize(x). You have to put that in your procedural code, not as part of the variable declaration. randomize() returns true or false depending on the success of the randomization.

if ( !std::randomize(h)) with {foreach(h[k]) h[k] inside {[0:8]};} )
       $error("randomization failed");


In reply to dave_59:

Hi Dave,

Thanks for baring with me and sorry for all the mistakes I have done.I wrote the c++ code just out of my head in the message box here.So I was not able to execute it i’m really sorry for it.

And also what if their is a case where i want to use the same h[k] in two modules like in the case of an checker where I have to make sure that the expected output and computed output are both equal.So the way i declared the random variable above will it work in my scoreboard???