Assigning queues in system verilog

SystemVerilog
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4

[i]In reply to dave_59:

I’m new in this system verilog concept and I’m sorry for the confusion. I wanted to change the value of h[k] for each clock cycles until 16 clock cycles and I wanted to do something like this
sum = 0x[n-k] for first clock cycle
sum = 0x[n-k] + 1*x[n-k] for second clock cycle
and so on for 16 clock cycles

  int h[k]= {0,1,2,3,4,5,6,7};	
                begin	
                for(int n = 0; n<8; ++n)begin
                 int sum = 0;
                for(int k = 0; k<n; ++k)begin
                sum += h[k]*x[n-k];
		end
               end
              end