vhdl-record-element-connect-systemverilog
Topic | Replies | Views | Activity | |
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How to connect unconstrained array of VHDL records to SV interface |
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1 | 877 | June 20, 2021 |
Topic | Replies | Views | Activity | |
---|---|---|---|---|
How to connect unconstrained array of VHDL records to SV interface |
![]() ![]() |
1 | 877 | June 20, 2021 |