Topics tagged sequences-and-properties

Topic	Replies	Views	Activity
Nested Implication SystemVerilog SystemVerilog , assertion , nested-suffix-implication , sequences-and-properties	10	6118	June 13, 2023
Which of the following would be the correct way of writing the property? SystemVerilog SystemVerilog , sequences-and-properties , assert-property , Assertion-system-verilog	2	1054	January 8, 2020
Properties for multiple signals(or array of signals) in the interface SystemVerilog SystemVerilog , property , sequences-and-properties , Bus-interface , actual-interface	2	3566	April 9, 2018