Verification Academy

Duty-cycle

Topic		Replies	Views	Activity
SVA to check frequency and duty cycle with +/- 5% error SystemVerilog SystemVerilog , assertion , SVA , Duty-cycle , Assertions-frequecncy-check		3	3600	January 19, 2021
Checking a clock using SVA SystemVerilog SystemVerilog , SVA , Duty-cycle		11	11660	August 18, 2016