Work around for generating particular code using generate block with dynamic variable in SVA for assert property

Hello Ben,
Thanks for your reply,


   // length value will change dynamically, len is signal
   // READ_DATA = 32;
   // tag is some value
  sequence STS_AND_TAG_CHECK(tag);
	@(posedge rd_rsp_clk) disable iff (rst_n !== 1) 
	rdata_valid |-> ((rdata_tag == tag) && (wr_rsp_error == 0 || wr_rsp_error == 1));		
  endsequence: STS_AND_TAG_CHECK

   //----------------------------------------------------------------
   // ******       DYNAMIC REPEAT q_s[*d1] **********
   // Application:  $rose(a)  |-> q_dynamic_repeat(q_s, d1) ##1 STS_AND_TAG_CHECK;
   sequence q_dynamic_repeat(count);
       int v=count;
       (1, v=count) ##0 first_match((1, v=v-1'b1) [*1:$] ##0 v<=0);
   endsequence

   A_STS_AND_TAG: assert property ($rose(cmd_valid) |-> q_dynamic_repeat(cmd_len/(READ_DATA/8)) ##0 STS_AND_TAG_CHECK(cmd_tag))
	            else $error("ERROR");

please let me know it is correct or not.