Virtual function in system verilog

UVM
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3

In reply to dave_59:

Thanks for the explanation.

But I still have a misunderstood.
what about coverage2 ?
should I define all coverage1…N with base_cov type?
and then should I connect each one of them ?

This way : ?


class env extends uvm_component;
 
    base_coverage cov1;
    base_coverage cov2;
    base_coverage cov3;
    reg_monitor reg_mon;
    `uvm_component_utils(env)
 
    function new(string name, uvm_component parent= null);
        super.new(name, parent);
    endfunction : new
 
    function void build_phase(uvm_phase phase);
        supeer.build_pahse(phase);
        cov1       = coverage1::type_id::create("cov1",this);  
        cov2       = coverage2::type_id::create("cov2",this);  
        cov3       = coverage3::type_id::create("cov3",this);  
        reg_mon    = reg_monitor::type_id::create("reg_mon",this);
    endfunction : build_phase
 
    function void connect_phase(uvm_phase phase);
        reg_mon.reg_ap.connect(cov1.in_ap);
        reg_mon.reg_ap.connect(cov2.in_ap);
        reg_mon.reg_ap.connect(cov3.in_ap);
    endfunction : connect_phase
 
endclass

why is not working when I define only the base and connect him.
all extended classes have already the base tasks and implementation.
where am I wrong ?