UVM_REG_BLOCK from UVM_REG

UVM
, ,
1

I want a handle of uvm_reg_block in uvm_reg as I want to write some different register from this reg_block . I am providing the exact scenario below .
Reg_block and Register declaration :

class ral_reg_1 extends override_reg; uvm_reg_field ID; 
function new(string name = "ral_reg_1");
endfunction: new

virtual function void build();
this.ID = uvm_reg_field::type_id::create(“ID”,get_full_name());
this.ID.configure(this, 32, 0, “RO”, 0, 8’h0, 0, 0, 1);
endfunction: build

`uvm_object_utils(ral_reg_1)

endclass : ral_reg_1

class reg_block_1 extends uvm_reg_block;
rand ral_reg_1 block_1_reg_1;
int is_int;
function new(string name = “reg_block_1”);
super.new(name, build_coverage(UVM_NO_COVERAGE));
endfunction: new

virtual function void build();
uvm_config_db#(int)::get(null,“”,“is_int”, is_int) ;
this.block_1_reg_1 = ral_reg_1::type_id::create(“block_1_reg_1”,get_full_name());
this.block_1_reg_1.configure(this, null, “”);
this.block_1_reg_1.build();
endfunction : build

`uvm_object_utils(reg_block_1)

endclass : reg_block_1

Now I am extending uvm_reg to override reg as I want different functionality when reg.write is called .I am showing example of integer , but I need multiple things from parent on basis of which reg.write will respond .Error location is in comments .
code :

class override_reg extends uvm_reg;

`uvm_object_utils(override_reg)
function new(string name = "override_reg");
	super.new(name, 32,build_coverage(UVM_NO_COVERAGE));
endfunction: new

task write(output uvm_status_e status,
input uvm_reg_data_t value,
input uvm_path_e path = UVM_DEFAULT_PATH,
input uvm_reg_map map = null,
input uvm_sequence_base parent = null,
input int prior = -1,
input uvm_object extension = null,
input string fname = “”,
input int lineno = 0);

// create an abstract transaction for this operation
uvm_reg_item rw;
uvm_reg_block reg_blk,reg_blk_p,blks[$];
$display(“Overidden”);
XatomicX(1);

set(value);

rw = uvm_reg_item::type_id::create(“write_item”,get_full_name());
rw.element = this;
rw.element_kind = UVM_REG;
rw.kind = UVM_WRITE;
rw.value[0] = value;
rw.path = path;
rw.map = map;
rw.parent = parent;
rw.prior = prior;
rw.extension = extension;
rw.fname = fname;
rw.lineno = lineno;

do_write(rw);
reg_blk = get_parent();
$display(“Overidden %s and indirect = %h”, reg_blk.get_name(),reg_blk.is_int); //Seeing error here , is_int not found
//I tried $cast also but same error , Is there any way to do this ? I don’t want to do typedef parent class and use handle of parent class , as I need to get it using get_parent only ( parent keeps on changing)

status = rw.status;

XatomicX(0);

endtask
endclass

Issue I have explained in comments .Please let me know how this can be achieved .

2

In reply to nikhilverif:

//I tried $cast also but same error , Is there any way to do this ? I don’t want to do typedef parent class and use handle of parent class , as I need to get it using get_parent only ( parent keeps on changing)

For the code you show above, $cast’ing to reg_block_1 should work, but based on your comment I’m guessing you have multiple extensions of uvm_reg_block. In that case, $cast won’t work as you need a common type to cast to.

Before I suggest a solution, why are you doing this? What are you trying to accomplish? uvm_reg is very opinionated about how you do things, and if you’re re-writing write() method it strikes me that there is probably a different way to accomplish your goal that is more in harmony with the architecture of uvm_reg.

-Ryan