Creating a UVM_MEM with access rights “WO” is not possible.
In the configure function of uvm_mem an error is thrown.
But the get_rights function’s documentation WO is one of the possible return values.
Is a WO memory not supported or is this some kind of bug?
In the source code of the uvm_mem configure function you can find this code:
if (m_access != "RW" && m_access != "RO") begin
`uvm_error("RegModel", {"Memory '",get_full_name(),"' can only be RW or RO"})
m_access = "RW";
end
And the documentation of get_rights is:
// Function: get_rights
//
// Returns the access rights of this memory.
//
// Returns "RW", "RO" or "WO".
// The access rights of a memory is always "RW",
// unless it is a shared memory
// with access restriction in a particular address map.
//
// If no address map is specified and the memory is mapped in only one
// address map, that address map is used. If the memory is mapped
// in more than one address map, the default address map of the
// parent block is used.
//
// If an address map is specified and
// the memory is not mapped in the specified
// address map, an error message is issued
// and "RW" is returned.
//
virtual function string get_rights (
uvm_reg_map map = null
)
Returns the access rights of this memory.
This returns “RW”, “RO”, or “WO”. The access rights of a memory is always “RW”, unless it is a shared memory with access restriction in a particular address map.
If no address map is specified and the memory is mapped in only one address map, that address map is used.
If the memory is mapped in more than one address map, the default address map of the parent block is used.
If an address map is specified and the memory is not mapped in the specified address map, a warning message shall be issued and “RW” is returned.
I understand WO is not permitted because of " The access rights of a memory is always “RW”, unless … ".
And ‘unless’ means the other option is “RO”.