UVM_MEM with Write Only access

In reply to kristof.marien@nokia.com:

Memory is not added to your Register model in your UVM testbench. You are adding there an address map like this:

uvm_mem rx_fifo_mem;

  virtual function void build;
     rx_fifo_mem = new( "rx_fifo_mem", 128, 16 );

     // HDL path inside the design
     rx_fifo_mem.add_hdl_path_slice("rx_fifo", 0, 16);

     rx_fifo_mem.configure( .parent(this), .hdl_path("") );

     // Add the memory to the register map
     default_map.add_mem(rx_fifo_mem, .offset(512), 
                                      .rights("RW"));
     //                               .unmapped(1));