SV Introspection

SystemVerilog
, ,
1

Hello,

I think this has been asked before but is there any example of introspection/reflection implementation in SV? basically what I want is that given an object such as the following, I can get the members name and type of an object or class.



typedef string m_types_table_t [string];

class obj;
 int x;
 bit y;
 string name;

function m_types_table_t get_members_types();
  m_types_table_t table;
  //some VPI/DPI to get all the members of a class and their type
  // foreach(member[i])
       // table[member[i].vpi/dpi get_name()] = member[i].vpi/dpi get_type_name();
  return table;
endfunction 
endclass

//somewhere
//...
obj my_obj;
m_types_table_t my_table;

my_obj   = new();
my_table = my_obj.get_members_types();
//outputs:
{'x': 'int', 'y': bit, 'name' = 'string'}

I understand this is a bit too much to ask but any working example that can be used as starting point is really appreciated.

Thanks
-R

2

In reply to rgarcia07: