In reply to hisingh:
|=> is equivalent to ##1 1 |->
//Thus,
@( posedge clk0 ) a |=> @( posedge clk1 ) b ;
// is equivalent to
@( posedge clk0 ) a ##1 1 |-> @( posedge clk1 ) b ;
Multiclocked properties can use the overlapping |-> or non-overlapping implication |=> operators to create a multiclocked property from an antecedent sequence and a consequent property. The |=> or the |-> operators synchronize the last expression of the antecedent clocked with the antecedent clock and the first elements of the consequent property being evaluated clocked with the consequent clock. The synchronization is the same as the one used with ##1 (for the |=>) and ##0 (for the |->) operators.
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
** SVA Handbook 4th Edition, 2016 ISBN 978-1518681448
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