Running C code on ARM based CPU in SoC, looking for handshake mechanism between C and SystemVerilog code

SystemVerilog
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Hi,

Writing C tests which run on ARM CPU (on the RTL and not using VC).
Looking for ideas, concepts, DVCON papers, SNUG papers, white papers etc.
To ease the communication process between the C code running on the ARM and the SystemVerilog code of test-bench.
For example:

  1. Intelligent way to migrate the config sequence of DUT registers for the various IPs on the SoC to the C code from SV/UVM code.
    Currently it is done manually.
  2. Suggestions on how to print messages to the test log from the C code being run on the ARM.

I am familiar with the SV C-DPI, but not sure how to synchronize the C code to SV code, when C is being executed on the ARM.

would appreciate any links to papers, ideas, concepts you are using and willing to share.

Thanks,

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In reply to Michael54:

See my DVCon paper “Easy Steps Towards Virtual Prototyping using the SystemVerilog DPI” for some background.

https://verificationacademy.com/forums/systemverilog/sv-dpi-accessing-task-within-module-c-code#reply-68439

https://verificationacademy.com/forums/systemverilog/easy-modelsim-dpi-book

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In reply to dave_59:

Thank you very much for the kind response Dave!
Will start reading the material you have pointed out.

If you have also any recommendations on good books for SoC verification practices/methodologies, will be great as well :)