Assume that clocking events i.e posedge of clk occurs at T0,T1,T2,T3…..Tn. ‘a’ is asserted at 2nd clocking event i.e T1. So ‘b’ should be asserted at T1 as well ( I assume ‘b’ could be high prior to assertion of ‘a’ as well ). ‘b’ should be sampled low for next 32 clocks i.e from T2 to T33.
Indirectly ‘a’ should be asserted from T1 to T33 i.e 33 clocks
A few questions
(Q1) If ‘a’ is sampled low at any clock from T2 to T33 then should the assertion should fail at the respective clock ?
(Q2) If ‘a’ is sampled low at T34 then should the assertion pass ? If yes, what should the sampled value of ‘b’ be at T34 ?
(Q3) If ‘a’ is sampled high at T:34 then should ‘b’ be high ? i.e 2nd iteration of b ##1 !b[*32]
If yes, when should ‘a’ be sampled low next and what should the value of ‘b’ be at that clock ?