In reply to chr_sue:
We can agree on next:
Front-door access is a MUST, no matter how long it takes accessing 1 register as it is the actual functionality of the RTL - which should be tested.
Maybe connections were wrong… These bugs should be revealed.
And you should add reg2bus, bus2reg and implement probably register access agent.
Back-door access is a MUST when you have registers of RO/WO access types and you want to write/read from it.
It can be nice addition in order to shorten simulation time, depends how many registers are present in the DUT.
Both Front-door/Back-door does not seem to have big impact on simulation performance, as far as I know, only have impact on simulation total run-time (clock cycles).