In reply to chr_sue:
I agree regards the bus2reg and reg2bus. Forgot about it.
And agree regards registers which are restricted to only RD or only WR, you MUST add back-door support for it, no way to avoid it.
Regards simulation time:
Front-door access does consumes time, while backdoor consumes zero simulation time.
It is a matter of trade-off, if you have 10-100 registers and all registers are “normal” - I mean support both RD and WR access, the initial CONFIG_PHASE won’t last for long, so maybe there is no need in adding support for back-door access.
But if it is few thousands of registers and more of writes in the CONFIG_PHASE, each write multiplied in the duration of each write, it sums to substantial delay (especially for Full-chip/SoC levels) till actual DATA_PHASE(traffic) is started. So back-door support is blessed.