Hello,
Good Evening guys!
I’m looking for few of the material related to the verification of Cache Coherency protocol or Verification Load/Store unit.
Like DMB (Data Memory Barrier) and DSB (Data Synchronization Barrier)
Any suggestion on which material to follow/ start with.
To give a brief background, I’m good enough with SystemVerilog, UVM and Assertions. I’m looking for a intermediate/advanced materials to follow is verification.
Lastly, i apologize if my question is too generic, i wanted to know what experts has w.r.t this topic.
I’m posting this coz i did not see any similar threads in this forum, so thought it might also useful to other if in case anyone like me are looking for similar issues.
Thank you!!