Interface modport: one signal always connected to a default value

In reply to dave_59:

So, yes, i think the answer based on what @Dave posted is: it is not possible to do that with the current SV semantics.

I would find it usefull though, cuz then i know that all modules that have a read-only interface can by definition only read the memory, for write is not possible.
It would be useful, i think. :)

Thank you for your help !