I had an issue regarding RAL, i am unable to create a map which should contains maps of different invidual registers

UVM
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//this block of code had a map name map now i want to link maps of both eth_reg_block and i2c_reg_block to a single map map

class mcs_try_reg_block extends uvm_reg_block;
uvm_object_utils(mcs_try_reg_block) mcs_eth_reg_block h_eth_reg_block; mcs_i2c_reg_block h_i2c_reg_block; uvm_reg_map map; virtual function void build(); h_eth_reg_block = mcs_eth_reg_block::type_id::create("eth_blk"); h_eth_reg_block.build; h_i2c_reg_block = mcs_i2c_reg_block::type_id::create("i2c_blk"); h_i2c_reg_block.build; endfunction endclass //this is block code for mcs_eth_reg_block class mcs_eth_reg_block extends uvm_reg_block; uvm_object_utils(mcs_eth_reg_block)
mcs_eth_IRQSTAT irqstat ;
mcs_eth_ISRSTAT_1_REG isrstat_1_reg ;
uvm_reg_map map;

function new(string name="mcs_eth_reg_block");      
	super.new(name,UVM_NO_COVERAGE);
endfunction

virtual function void build();
	irqstat  = mcs_eth_IRQSTAT  ::type_id::create("irqstat ");
	irqstat .build();
			irqstat .configure(this,null,"");
	isrstat_1_reg = mcs_eth_ISRSTAT_1_REG ::type_id::create("isrstat_1_reg");
	isrstat_1_reg.build();
			isrstat_1_reg.configure(this,null,"");

	irqstat .add_hdl_path_slice("TBD",0,16);
	isrstat_1_reg.add_hdl_path_slice("TBD",0,16);

	map=create_map("map",'h00,4,UVM_LITTLE_ENDIAN);
	map.add_reg(irqstat ,  16'h00,  "RO");
	map.add_reg(isrstat_1_reg,  16'h01,  "RO");
	add_hdl_path("","RTL");
	lock_model();
endfunction

endclass

similarky for i2c_reg_block