How to select appropriate package to import with a parameter?

SystemVerilog
, ,
1

Hello,
Please see my code below. I am trying to use a parameter to selectively import appropriate package into the module during instantiation. I’m at loss how I can apply the parameter around the import statement.

Any suggestions?


module xgphy_regs
  #(parameter XGPHY_REG_MAP = 0 )
  ( 
    input logic rstn,
    input logic clk,

    input  logic [0:0] debug_data,
    input logic [0:0] status,

    reg_if.slave reg_slave_if
    );

  //////////////////
  // declarations //
  //////////////////
  
  //conditionally import package based on XGPHY_REG_MAP parameter value
  import xgphy_0_reg_pkg::*;
  //or
  import xgphy_1_reg_pkg::*;
  
  endmodule

Thank you.
Best regards,
Sanjay

2

In reply to shparekh:
SystemVerilog has no feature to parameterize the selection of a package to import.

You might consider putting what was inside your packages into a set of interface, then then connecting the desired interface to the port of your module.

If your package was just a set of parameter values, you might consider creating a struct as a parameter and passing different struct values as a parameter override.

If this doesn’t work for you or does not make sense, you’ll need to provide a better picture of what you are trying to accomplish.

3

In reply to shparekh:

Hi,

This seems to compile, see if you can access package variables as well.

generate
  if (condition) begin
    import xgphy_0_reg_pkg::*;
  end else begin
    import xgphy_1_reg_pkg::*;
  end
endgenerate
4

*In reply to mayurkubavat:*That won’t help because the visibility of the import is limited to the scope of the generated blocks.