How to choose a testcase class from command line on SV

SystemVerilog
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2

In reply to vadivelan014:

You can do it brute force with a case statement

case (test_name)
"test_base" : test = new();
"test1" : test = test1::new();
"test2" : test = test2::new();
endcase

Or you can build your own factory can look-up the class by a string name in an associative array. If you want to understand how the factory works, check out my new SystemVerilog OOP course, especially the third session.