How to bind a SV interface signal to a VHDL type?

SystemVerilog
, ,
1

I am trying to bind an interface to my VHDL module. The signal that I want to bind to is defined as follows in the module:

TYPE dut_fsm_type is (
                           IDLE_STATE,
                           WAIT_STATE,
                           IDENTIFY_STATE,
                           LATCH_STATE,
                           DONE_STATE,
                           ERROR_STATE
                          );
signal dut_fsm_state       : dut_fsm_type;
signal prev_dut_fsm_state  : dut_fsm_type;

My instantiation of the interface module and bind statement look something like this:

bind my_dut my_intf my_intf_0 (.*,
                               .fsm_state     (tb.u_dut.dut_fsm_state),
                               .prev_fsm_state(tb.u_dut.prev_dut_fsm_state)
                              );

I had no idea what length my input signal fsm_state should be, so I just set it to 32 bits.

interface my_intf (
  input bit[31:0] fsm_state,
  input bit[31:0] prev_fsm_state
);

When I try to compile in questasim 10.4, I get the following message:
(vopt-2245) Type (‘dut_fsm_type’) of VHDL hierarchical reference, used as actual expression in bind statement, must be defined in a package.

Any idea how to handle this?

2

In reply to noobuntu:

You are lucky to be using Questa as it has native support this scenario - see: EDA Software, Hardware & Tools | Siemens Software

That white-paper has a similar example like yours.

Good Luck
Srini
www.verifworks.com

3

In reply to Srini @ CVCblr.com:

Beautiful! Thank you sir!

4

In reply to noobuntu:

This doesn’t work exactly as the paper talks about. There were some changes I needed to make from the whitepaper to get it to work. Not sure if that is because it is a different version of questasim or something else…

  1. The vhdl TYPE should be in a seperate vhdl package
  2. Doing an assign in my interface module doesn’t work. I needed to static cast it to my enum type to get it to work.

All in all, once the above is done, it works like a charm.